NATALE, GIUSEPPE
NATALE, GIUSEPPE
DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA
A CAD Open Platform for High Performance Reconfigurable Systems in the EXTRA Project
2017-01-01 Rabozzi, Marco; Brondolin, Rolando; Natale, Giuseppe; DEL SOZZO, Emanuele; Huebner, Michael; Brokalakis, Andreas; Ciobanu, Catalin; Stroobandt, Dirk; Santambrogio, MARCO DOMENICO
A Feedback-Based Design Space Exploration Subsystem for the Automation of Architectures Synthesis on Proprietary FPGA Toolchains
2017-01-01 Pappalardo, Alessandro; Natale, Giuseppe; Santambrogio, Marco Domenico
A framework with cloud integration for CNN acceleration on FPGA devices
2018-01-01 Raspa, Niccolo'; Natale, Giuseppe; Bacis, Marco; Santambrogio, Marco D.
A pipelined and scalable dataflow implementation of convolutional neural networks on FPGA
2017-01-01 Bacis, Marco; Natale, Giuseppe; DEL SOZZO, Emanuele; Santambrogio, MARCO DOMENICO
A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops
2016-01-01 Natale, Giuseppe; Stramondo, Giulio; Bressana, Pietro; Cattaneo, Riccardo; Sciuto, Donatella; Santambrogio, MARCO DOMENICO
An FPGA-based acceleration methodology and performance model for iterative stencils
2018-01-01 Reggiani, Enrico; Natale, Giuseppe; Moroni, Carlo; Santambrogio, Marco D.
Enabling Transparent Hardware Acceleration on Zynq SoC for Scientific Computing
2020-01-01 Stornaiuolo, Luca; Carloni, Filippo; Pressiani, Riccardo; Natale, Giuseppe; Santambrogio, Marco; Sciuto, Donatella
Enhancing the Scalability of Multi-FPGA Stencil Computations via Highly Optimized HDL Components
2021-01-01 Reggiani, Enrico; Del Sozzo, Emanuele; Conficconi, Davide; Natale, Giuseppe; Moroni, Carlo; Santambrogio, Marco D.
Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project
2017-01-01 Rabozzi, Marco; Natale, Giuseppe; DEL SOZZO, Emanuele; Scolari, Alberto; Stornaiuolo, Luca; Santambrogio, MARCO DOMENICO
On how to accelerate iterative stencil loops: A scalable streaming-based approach
2015-01-01 Cattaneo, Riccardo; Natale, Giuseppe; Sicignano, Carlo; Sciuto, Donatella; Santambrogio, MARCO DOMENICO
On How to Design Dataflow FPGA-Based Accelerators for Convolutional Neural Networks
2017-01-01 Natale, Giuseppe; Bacis, Marco; Santambrogio, MARCO DOMENICO
Optimizing streaming stencil time-step designs via FPGA floorplanning
2017-01-01 Rabozzi, Marco; Natale, Giuseppe; Festa, Biagio; Miele, Antonio; Santambrogio, Marco D.