RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

SAMI, MARIAGIOVANNA
 Distribuzione geografica
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Continente #
NA - Nord America 5.170
EU - Europa 3.629
AS - Asia 1.369
SA - Sud America 372
AF - Africa 79
OC - Oceania 6
Continente sconosciuto - Info sul continente non disponibili 5
Totale 10.630
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Nazione #
US - Stati Uniti d'America 5.051
RU - Federazione Russa 1.207
IT - Italia 1.004
SG - Singapore 551
CN - Cina 466
BR - Brasile 324
UA - Ucraina 308
DE - Germania 225
SE - Svezia 212
VN - Vietnam 175
AT - Austria 151
FI - Finlandia 126
GB - Regno Unito 120
CA - Canada 104
NL - Olanda 82
IE - Irlanda 49
ES - Italia 48
FR - Francia 44
MA - Marocco 43
IN - India 35
AR - Argentina 25
BD - Bangladesh 17
KR - Corea 17
IQ - Iraq 16
BE - Belgio 15
HK - Hong Kong 15
CI - Costa d'Avorio 13
JO - Giordania 13
UZ - Uzbekistan 10
TR - Turchia 9
ZA - Sudafrica 9
CZ - Repubblica Ceca 8
VE - Venezuela 8
GR - Grecia 7
JP - Giappone 7
MX - Messico 7
PL - Polonia 6
SA - Arabia Saudita 6
EC - Ecuador 5
AE - Emirati Arabi Uniti 4
EU - Europa 4
ID - Indonesia 4
NZ - Nuova Zelanda 4
PK - Pakistan 4
TN - Tunisia 4
UY - Uruguay 4
EG - Egitto 3
HR - Croazia 3
NP - Nepal 3
AL - Albania 2
BG - Bulgaria 2
CH - Svizzera 2
CO - Colombia 2
DZ - Algeria 2
IL - Israele 2
JM - Giamaica 2
LK - Sri Lanka 2
OM - Oman 2
PA - Panama 2
PE - Perù 2
PH - Filippine 2
PY - Paraguay 2
AU - Australia 1
AZ - Azerbaigian 1
BA - Bosnia-Erzegovina 1
BH - Bahrain 1
BJ - Benin 1
CR - Costa Rica 1
DK - Danimarca 1
DO - Repubblica Dominicana 1
IR - Iran 1
KG - Kirghizistan 1
KZ - Kazakistan 1
LA - Repubblica Popolare Democratica del Laos 1
LT - Lituania 1
LU - Lussemburgo 1
MK - Macedonia 1
MU - Mauritius 1
MW - Malawi 1
MY - Malesia 1
PS - Palestinian Territory 1
PT - Portogallo 1
RE - Reunion 1
RO - Romania 1
RS - Serbia 1
TJ - Tagikistan 1
TT - Trinidad e Tobago 1
TV - Tuvalu 1
VC - Saint Vincent e Grenadine 1
XK - ???statistics.table.value.countryCode.XK??? 1
ZW - Zimbabwe 1
Totale 10.630
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Città #
Fairfield 568
Woodbridge 529
Ashburn 526
Singapore 341
Ann Arbor 330
Chandler 303
Wilmington 300
Houston 297
Santa Clara 266
Seattle 237
Jacksonville 176
Cambridge 173
Moscow 158
Vienna 150
Beijing 147
Dearborn 139
Milan 104
Boardman 90
Hefei 84
Lawrence 79
Medford 79
Ottawa 78
Council Bluffs 75
Verona 68
Dong Ket 53
Dublin 46
Los Angeles 43
Málaga 40
Helsinki 39
Rome 39
Casablanca 38
New York 36
Dallas 34
Buffalo 30
Kent 30
Amsterdam 29
Des Moines 26
San Diego 26
São Paulo 26
Frankfurt am Main 21
Naples 19
Auburn Hills 17
The Dalles 17
Hanoi 16
Munich 16
Ho Chi Minh City 15
Brescia 14
London 14
Abidjan 13
Amman 13
Belo Horizonte 13
Brussels 13
Hong Kong 13
Catania 12
Collegno 12
Falls Church 12
Padova 12
Norwalk 11
Seoul 11
Bologna 10
Rio de Janeiro 10
Tashkent 10
Trieste 10
Turin 10
Brooklyn 9
Florence 9
Brasília 8
Redondo Beach 8
Stockholm 8
Turku 8
Curitiba 7
Gavirate 7
Mountain View 7
Tianjin 7
Tokyo 7
Alessandria 6
Atlanta 6
Carnate 6
Changsha 6
Dalmine 6
Denver 6
Grugliasco 6
Guangzhou 6
Maceió 6
North York 6
Poplar 6
Redwood City 6
Roubaix 6
Sona 6
Trento 6
Venice 6
Washington 6
Chicago 5
Dhaka 5
Düsseldorf 5
Illasi 5
Kunming 5
Manaus 5
Miami 5
Nanjing 5
Totale 6.393
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Nome #
Progettazione digitale 898
A digital front-end and readout microsystem for calorimetry at LHC 230
Low-power Architectures for Mobile Systems 202
Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering 194
ADSC: Application-Driven Storage Control for Energy Efficiency 186
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 184
Analyzing the Sensitivity to Faults of Synchronization Primitives 184
Branch Prediction Techniques for Low-Power VLIW Processors 183
Optimized digital feature extraction in the FERMI microsystem 180
Area compaction in Silicon Structures for Neural Net Implementation 174
A Compact and Fast Silicon Implementation for Layered Neural Nets 171
A configurable array architecture for WSI implementation of neural nets 167
A digital Architecture for Neural Networks 160
Fault Tolerant Characteristics of the Linear Array Architecture for WSI Implementation of Neural Nets 159
A general configurable architecture for WSI implementation for neural nets 156
An Instruction-Level Energy Model for Embedded VLIW Architectures 156
Fault-tolerance in FFT Arrays: Time Redundancy Approaches 155
Exploiting Data Forwarding to Reduce the Power Budget of VLIW Embedded Processors 153
Evaluation of FERMI readout of the ATLAS tilecal prototype 151
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems 151
A Proposal for Neural Macrocell Array 147
Fault Tolerance in FFT Arrays: Time redundancy Approaches 145
Arrays for digital signal processing functions: fault tolerance and functional reconfiguration 141
Energy/Performance Evaluation of the Multithreaded Extion of a Muulticluster VLIW Processor 140
Multithreaded Extension to Multicluster VLIW Processors for Embedded Applications 140
Fault Tollerant Aspects in Silicon Structures for Neural Nets 140
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project 138
Optimal Design of Wireless Sensor Networks 135
Multistage Interleaved Architectures for Implementation of Neural Networks 134
Determining the Optimum Extended Instruction-Set Architecture for Application Specific Reconfigurable VLIW CPUs 133
Low-Power Data Forwarding for VLIW Embedded Architectures 132
A DAG-based Design Approach for Reconfigugrable VLIW Processors 132
Power Estimation and Optimization Methodologies for VLIW-Based Embedded Systems 131
An Approach for Digital Neural Network Design 130
Tolerance to transient faults in microprogrammed control units 130
Design of Fault Tolerant Network Interfaces for NoCs 130
Struttura e progetto dei Calcolatori, L’interfaccia Hardware-Software 130
Testing of Very Large Systems - A Hierarchical Approach To Fault Coverage Evaluation 128
Power Exploration for Embedded VLIW Architectures 128
Behavioral Testability and Test Pattern Generation of the Hopfield Network Model 128
Instruction-Level Power Estimation for Embedded VLIW Cores 127
FERMI - A new generation of electronic modules for large data acquisition arrays required for high energy physics 127
Fault identification and fault location in algorithmic flow-driven WSI architectures 127
Semiconcurrent error detection in data paths 127
Low-Power Branch Prediction Techniques for VLIW Architectures: A Compiler-Hints Based Approach 126
System level policies for fault tolerance issues in the FERMI project 126
A semi-custom approach for digital implementation of neural networks 121
Alternative Approaches for Mapping Neural Networks onto Silicon 119
Mapping Neural Nets onto Massively parallel Silicon Architectures: A Defect-Tolerance Solution 118
FERMI: A digital front-end and readout microsystem for high resolution calorimetry 118
FERMI - A new generation of electronic modules for large data acquisition arrays required for high energy physics 118
An Array Architecture for WSI Implementation of Neural Nets 117
Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations 114
On-line Dignosis and Reconfiguration of FPGA Systems 107
High-Level Synthesis of Data Paths with Concurrent Error Detection 107
MRI parallel processing for embedded visualization 106
Testing and Diagnosis of FFT Arrays 103
Testability of artificial neural networks: A behavioral approach 103
Power-Aware Branch Prediction Techniques: A Compiler-Hints Based Approach for VLIW Processors 103
FSM-based power modeling of wireless protocols: the case of Bluetooth 102
Testing approaches for flow graph derived FFTs arrays 98
Reducing the complexity of instruction-level power models for VLIW processors 91
Power Reduction on VLIW Processors through Data Forwarding 90
Virtual semi-concurrent self-checking for heterogeneous MPSoC architectures 90
Semi-Concurrent Error Detection in Data Paths 90
Creating an Embedded Systems Program from Scratch: Nine years of experience at ALaRI 86
SIMD extension to VLIW multicluster processors for embedded application 86
Crittografia elettronica 85
Fault-Tolerant multipliers for complex numbers 80
Fault-Tolerant solutions for complex number multipliers 77
Processor architecture with variable-stage pipeline 75
Optimizing High-Level Synthesis for Self-Checking Arithmetic Circuits 74
Progettazione digitale 72
Determining the Optimum Extended Instruction-Set Architecture for Application Specific Reconfigurable VLIW 72
Security in Networks-on-Chips 69
Processor Architecture 69
Guest Editor Introduction, Special Issue on “Challenges in Self-Adaptive Computing” 65
Processori riconfigurabili: un’alternativa flessibile per i sistemi dedicati 59
Linguaggi per la progettazione dell’hardware 56
Totale 10.686
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Categoria #
all - tutte 29.366
article - articoli 8.717
book - libri 2.010
conference - conferenze 16.336
curatela - curatele 271
other - altro 0
patent - brevetti 487
selected - selezionate 0
volume - volumi 1.545
Totale 58.732
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021539 0 0 0 0 0 52 77 87 46 88 45 144
2021/2022771 31 101 52 77 135 33 46 34 26 45 67 124
2022/2023849 104 67 19 97 96 96 15 61 140 73 53 28
2023/2024603 45 84 39 149 29 49 36 49 12 39 10 62
2024/20251.519 5 33 44 70 264 200 64 149 192 73 219 206
2025/20262.754 951 887 202 395 265 54 0 0 0 0 0 0
Totale 10.686