SCALETTI, LORENZO
SCALETTI, LORENZO
DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA
A 10.2-ENOB, 150-MS/s redundant SAR ADC with a quasi-monotonic switching algorithm for time-interleaved converters
2022-01-01 Scaletti, Lorenzo; Be', Gabriele; Parisi, Angelo; Bertulessi, Luca; Ricci, Luca; Mercandelli, Mario; Levantino, Salvatore; Samori, Carlo; Bonfanti, ANDREA GIOVANNI
A 2-GS/s Time-Interleaved ADC With Embedded Background Calibrations and a Novel Reference Buffer for Reduced Inter-Channel Crosstalk
In corso di stampa Ricci, Luca; Be', Gabriele; Rocco, Michele; Scaletti, Lorenzo; Zanoletti, Gabriele; Bertulessi, Luca; Lacaita, Andrea; Levantino, Salvatore; Samori, Carlo; Bonfanti, ANDREA GIOVANNI
A 250-MS/s 9.9-ENOB 80.7dB-SFDR Top-Plate Input SAR ADC with Charge Linearization
2024-01-01 Zanoletti, Gabriele; Scaletti, Lorenzo; Be', Gabriele; Ricci, Luca; Rocco, Michele; Bertulessi, Luca; Samori, Carlo; Bonfanti, Andrea
A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS
2023-01-01 Ricci, L.; Scaletti, L.; Be', G.; Rocco, M.; Bertulessi, L.; Levantino, S.; Lacaita, A.; Samori, C.; Bonfanti, A.
A 900-MS/s SAR-based Time-Interleaved ADC with a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations
2022-01-01 Be', G.; Parisi, A.; Bertulessi, L.; Ricci, L.; Scaletti, L.; Mercandelli, M.; Lacaita, A. L.; Levantino, S.; Samori, C.; Bonfanti, A.
A Novel Push-Pull Input Buffer for Wideband ADCs with Improved High-Frequency Linearity
2023-01-01 Scaletti, Lorenzo; Bertulessi, Luca; Cristofoli, Andrea; Bonfanti, Andrea
Concurrent effect of redundancy and switching algorithms in SAR ADCs
2022-01-01 Ricci, Luca; Scaletti, Lorenzo; Be', Gabriele; Bertulessi, Luca; Levantino, Salvatore; Samori, Carlo; Bonfanti, Andrea
Skew and Jitter Performance in CMOS Clock Phase Splitter Circuits
2021-01-01 Scaletti, L.; Parisi, A.; Bertulessi, L.