RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

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Titolo Data di pubblicazione Autori File
Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow 1-gen-2006 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Combining Hardware Reconfiguration and Adaptive Computation for a Novel SoC Design Methodology 1-gen-2006 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A Caronte-oriented approach to a network-based educational infrastructure 1-gen-2006 FERRANDI, FABRIZIORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow 1-gen-2006 FERRANDI, FABRIZIORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICO +
Data memory management in partial dynamically reconfigurable systems 1-gen-2007 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICO +
RoadRunner and IPGen: a combined solution to speedup the reconfigurable architectures design 1-gen-2007 BOLCHINI, CRISTIANABRANDOLESE, CARLOFRIGERIO, LAURARANA, VINCENZOSALICE, FABIOSANTAMBROGIO, MARCO DOMENICO
An adaptive genetic algorithm for dynamically reconfigurable modules allocation 1-gen-2007 RANA, VINCENZOSANDIONIGI, CHIARASANTAMBROGIO, MARCO DOMENICO
A genetic algorithm based solution for dynamically reconfigurable modules allocation 1-gen-2007 RANA, VINCENZOSANDIONIGI, CHIARASANTAMBROGIO, MARCO DOMENICO
Dynamic Reconfigurability in Embedded System Design 1-gen-2007 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
Partial dynamic reconfiguration in a multi-FPGAs clustered architecture based on Linux 1-gen-2007 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Adaptive genetic algorithm for dynamically reconfigurable modules allocation 1-gen-2007 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A Novel SoC Design Methodology Combining Adaptive Software and Reconfigurable Hardware 1-gen-2007 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A Generation Flow for Self-Reconguration Controllers Customization 1-gen-2008 GRASSI, PAOLO ROBERTORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Operating System Support for Online Partial Dynamic Reconguration Management 1-gen-2008 SANTAMBROGIO, MARCO DOMENICORANA, VINCENZOSCIUTO, DONATELLA
A Requirements-Driven Simulation Framework For Communication Infrastructures Design 1-gen-2008 BRUSCHI, FRANCESCOMERONI, ALESSANDRORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICO
The Shining embedded system design methodology based on self dynamic reconfigurable architectures 1-gen-2008 CURINO, CARLO ALDORANA, VINCENZOREDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
Low cost smartcam design 1-gen-2008 RANA, VINCENZOMATTEUCCI, MATTEOBONARINI, ANDREA +
A Light-Weight Network-on-Chip Architecture for Dynamically Recongurable Systems 1-gen-2008 CORBETTA, SIMONERANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
HARPE: a Harvard-based Processing Element Tailored for Partial Dynamic Recongurable Architectures 1-gen-2008 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
An Architecture for Dynamically Reconfigurable Real Time Audio Processing Systems 1-gen-2008 BRUSCHI, FRANCESCORANA, VINCENZOSCIUTO, DONATELLA
A Requirements-Driven Recongurable SoC Communication Infrastructure Design Flow 1-gen-2008 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
On-line task management for a reconfigurable cryptographic architecture 1-gen-2009 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Run-time Applications Mapping on Fine-Grained Reconfigurable Embedded Systems 1-gen-2009 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Reconfigurable NoC Design Flow for Multiple Applications Run-Time Mapping on FPGA Devices 1-gen-2009 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Design of Communication Infrastructures for Reconfigurable Systems 1-gen-2009 MERONI, ALESSANDRORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOBRUSCHI, FRANCESCO
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems 1-gen-2009 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Scheduling and 2D Placement Heuristics for Partially Reconfigurable Systems 1-gen-2009 REDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICORANA, VINCENZO +
A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication 1-gen-2010 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A novel design framework for the design of reconfigurable systems based on NoCs 1-gen-2010 RANA, VINCENZOSCIUTO, DONATELLA
Operating System Runtime Management of Partially Dynamically Reconfigurable Embedded Systems 1-gen-2010 SANTAMBROGIO, MARCO DOMENICORANA, VINCENZOSCIUTO, DONATELLA +
Design Methodologies and Mapping Algorithms for Recongurable NoC-based Systems 1-gen-2010 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOMERONI, ALESSANDRO
Run-time mapping of applications on FPGA-based reconfigurable systems 1-gen-2010 RANA, VINCENZOSCIUTO, DONATELLA +
Multiple communication-domains design in FPGA-based Systems-on-Chip 1-gen-2010 SANTAMBROGIO, MARCO DOMENICORANA, VINCENZOSCIUTO, DONATELLACORBETTA, SIMONE
Dynamic Recongurable NoCs: Characteristics and Performance Issues 1-gen-2010 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOCORBETTA, SIMONE
A Reconfigurable System Based on a Parallel and Pipelined Solution for Regular Expression Matching 1-gen-2010 BRUSCHI, FRANCESCORANA, VINCENZO +
A high-performance parallel implementation of the Chambolle algorithm 1-gen-2011 NACCI, ALESSANDRO ANTONIORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICO +
A Mapping Flow for Dynamically reconfigurable Multi-Core System-on-Chip Design 1-gen-2011 RANA, VINCENZOSCIUTO, DONATELLA +
Island-Based Adaptable Embedded System DEsign 1-gen-2011 RANA, VINCENZOSCIUTO, DONATELLA +
An efficient Qauntum-Dot Cellular Automata adder 1-gen-2011 BRUSCHI, FRANCESCORANA, VINCENZOSCIUTO, DONATELLA +
A Hybrid Mapping-Scheduling Technique for Dynamically Reconfigurable Hardware 1-gen-2011 RANA, VINCENZOSCIUTO, DONATELLA +
On-chip network resource management design and validation 1-gen-2011 BRUSCHI, FRANCESCOMIELE, ANTONIO ROSARIORANA, VINCENZO
B2IRS: A Technique to Reduce BAN-BAN Interferences in Wireless Sensor Networks 1-gen-2012 GRASSI, PAOLO ROBERTORANA, VINCENZOSCIUTO, DONATELLA +
Tacit Consent: A Technique to Reduce Redundant Transmissions from Spatially Correlated Nodes in Wireless Sensor Networks 1-gen-2012 GRASSI, PAOLO ROBERTORANA, VINCENZOSCIUTO, DONATELLA +
Design exploration of energy-performance trade-offs for wireless sensor networks 1-gen-2012 GRASSI, PAOLO ROBERTORANA, VINCENZO +
Knowledge-Based Design Space Exploration of Wireless Sensor Networks 1-gen-2012 GRASSI, PAOLO ROBERTORANA, VINCENZOSCIUTO, DONATELLA +
Model-Based Design for Wireless Body Sensor Network Nodes 1-gen-2012 GRASSI, PAOLO ROBERTORANA, VINCENZOSCIUTO, DONATELLA +
A High-Level Synthesis Flow for the Implementation of Iterative Stencil Loop Algorithms on FPGA Devices 1-gen-2013 NACCI, ALESSANDRO ANTONIORANA, VINCENZOBRUSCHI, FRANCESCOSCIUTO, DONATELLA +
Design methods for parallel hardware implementation of multimedia iterativealgorithms 1-gen-2013 RANA, VINCENZONACCI, ALESSANDRO ANTONIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Improving the security and the scalability of the AES algorithm 1-gen-2013 NACCI, ALESSANDRO ANTONIORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
BlueSentinel: A first approach using iBeacon for an energy efficient occupancy detection system 1-gen-2014 NACCI, ALESSANDRO ANTONIORANA, VINCENZOSCIUTO, DONATELLA +
Mostrati risultati da 1 a 50 di 75
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