DURELLI, GIANLUCA CARLO

DURELLI, GIANLUCA CARLO  

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Titolo Data di pubblicazione Autori File
A2B: an Integrated Framework for Designing Heterogeneous and Reconfigurable Systems 1-gen-2013 SCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICOPILATO, CHRISTIANCATTANEO, RICCARDODURELLI, GIANLUCA CARLONACCI, ALESSANDRO ANTONIO
Adaptive Raytracing Implementation Using Partial Dynamic Reconfiguration 1-gen-2014 DURELLI, GIANLUCA CARLOSPADA, FABRIZIOCATTANEO, RICCARDOPILATO, CHRISTIANSANTAMBROGIO, MARCO DOMENICO +
An open-source design and validation platform for reconfigurable systems 1-gen-2012 BONETTO, ALESSANDRACAZZANIGA, ANDREADURELLI, GIANLUCA CARLOPILATO, CHRISTIANSCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICO
Automatic run-time manager generation for reconfigurable MPSoC architectures 1-gen-2012 DURELLI, GIANLUCA CARLOPILATO, CHRISTIANCAZZANIGA, ANDREASCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICO
Autonomic thread scaling library for QoS management 1-gen-2016 DURELLI, GIANLUCA CARLOSANTAMBROGIO, MARCO DOMENICO
Exploiting FPGAs from higher level languages a signal analysis case study 1-gen-2017 Stornaiuolo, L.PARRAVICINI, ALBERTODurelli, G.Santambrogio, M. D.
A Flexible and Reconfigurable Interconnection Structure for FPGA Dataflow Applications 1-gen-2013 DURELLI, GIANLUCA CARLONACCI, ALESSANDRO ANTONIOCATTANEO, RICCARDOPILATO, CHRISTIANSCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICO
Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation 1-gen-2017 RABOZZI, MARCODURELLI, GIANLUCA CARLOMIELE, ANTONIO ROSARIOSANTAMBROGIO, MARCO DOMENICO +
FPGA-based design using the FASTER toolchain: the case of STM Spear development board 1-gen-2014 SCOLARI, ALBERTODURELLI, GIANLUCA CARLOCATTANEO, RICCARDOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
GPU-based computation for brain spatio-temporal networks definition 1-gen-2017 Purgato A.Reggiani E.D'Arnese E.Durelli G.Santambrogio M. D. +
A hardware approach to protein identification 1-gen-2015 DURELLI, GIANLUCA CARLOSANTAMBROGIO, MARCO DOMENICO +
Hardware design automation of convolutional neural networks 1-gen-2016 DEL SOZZO, EMANUELEDURELLI, GIANLUCA CARLOSANTAMBROGIO, MARCO DOMENICO +
Mini-Robot's Performance Optimization via Online Reconfiguration and HW/SW Task Scheduling 1-gen-2012 DURELLI, GIANLUCA CARLOSCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICO +
On how to efficiently accelerate brain network analysis on FPGA-based computing system 1-gen-2015 Durelli, GianlucaCattaneo, RiccardoPallotta, GabrieleSantambrogio, Marco D. +
On how to extract breathing rate from PPG signal using wearable devices 1-gen-2015 ONORATI, FRANCESCODURELLI, GIANLUCA CARLOSANTAMBROGIO, MARCO DOMENICO +
On How to improve FPGA-based systems design productivity via SDAccel 1-gen-2016 GUIDI, GIULIAREGGIANI, ENRICODI TUCCI, LORENZODURELLI, GIANLUCA CARLOSANTAMBROGIO, MARCO DOMENICO +
On the automatic integration of hardware accelerators into FPGA-based embedded systems 1-gen-2012 PILATO, CHRISTIANCAZZANIGA, ANDREADURELLI, GIANLUCA CARLOSCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICO +
On the development of a runtime reconfigurable multicore system-on-chip 1-gen-2012 CAZZANIGA, ANDREADURELLI, GIANLUCA CARLOPILATO, CHRISTIANSCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICO
An orchestrated approach to efficiently manage resources in heterogeneous system architectures 1-gen-2015 PALLOTTA, GABRIELEDURELLI, GIANLUCA CARLOMIELE, ANTONIO ROSARIOBOLCHINI, CRISTIANASANTAMBROGIO, MARCO DOMENICO
PaRA-Sched: A Reconfiguration-Aware Scheduler for Reconfigurable Architectures 1-gen-2014 CATTANEO, RICCARDODURELLI, GIANLUCA CARLOPILATO, CHRISTIANSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +