RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

RONCONI, ENRICO
 Distribuzione geografica
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Continente #
NA - Nord America 407
EU - Europa 303
AS - Asia 100
AF - Africa 14
SA - Sud America 2
Totale 826
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Nazione #
US - Stati Uniti d'America 401
IT - Italia 178
SG - Singapore 55
NL - Olanda 35
DE - Germania 33
FI - Finlandia 16
JO - Giordania 12
BJ - Benin 11
GB - Regno Unito 11
CN - Cina 10
ID - Indonesia 9
AT - Austria 8
IE - Irlanda 7
CA - Canada 6
ES - Italia 6
HK - Hong Kong 5
FR - Francia 4
VN - Vietnam 4
BR - Brasile 2
CI - Costa d'Avorio 2
TW - Taiwan 2
UA - Ucraina 2
CH - Svizzera 1
CZ - Repubblica Ceca 1
IN - India 1
PH - Filippine 1
SC - Seychelles 1
SI - Slovenia 1
TR - Turchia 1
Totale 826
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Città #
Santa Clara 195
Milan 71
Ashburn 40
Singapore 39
Boardman 38
Amsterdam 34
Munich 19
Amman 12
Cotonou 11
Helsinki 11
New York 11
Bresso 10
Jakarta 9
Chandler 8
Dublin 7
Parma 6
Vancouver 6
Lappeenranta 5
Málaga 5
Pwllheli 5
Trieste 5
Vienna 5
Guangzhou 4
Hong Kong 4
Rome 4
Borgosatollo 3
Campobasso 3
Colorno 3
Correggio 3
Fairfield 3
Mozzo 3
Nuremberg 3
San Diego 3
Vedano al Lambro 3
Washington 3
Abidjan 2
Brescia 2
Collonges-sous-Saleve 2
Comun Nuovo 2
East Setauket 2
Falkenstein 2
Gallarate 2
Lawrence 2
London 2
Medford 2
Naples 2
Phoenix 2
Pisa 2
Ponte San Pietro 2
Sant'Agostino 2
São Paulo 2
Vittoria 2
Bergamo 1
Bern 1
Bourg-la-Reine 1
Cambridge 1
Central 1
Clifton 1
Florence 1
Hounslow 1
Imola 1
Kadirli 1
Leipzig 1
Ljubljana 1
Los Angeles 1
Manila 1
Mazzano 1
Olomouc 1
Pavia 1
Sacile 1
Seattle 1
Wilmington 1
Xi'an 1
Totale 649
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Nome #
High-Performance computing of Real-Time and Multi-Channel Histograms: a Full FPGA Approach 62
Multi-COBS: A Novel Algorithm for Byte Stuffing at High Throughput 59
High-Performance Physical-Independent Address-Based Communication Interface for FPGA in Custom Scientific Equipment 56
Scalable Time Measurement System based on a Multi-FPGA Architecture 49
Assessment of the Bundle SNSPD Plus FPGA-Based TDC for High-Performance Time Measurements 46
A Study of the Latest Updates of the DAQ Firmware for the DSSC Camera at the European XFEL 40
High-Resolution Imager Based on Time-to-Space Conversion 39
FPGA-based SiPM Timestamp Detection Setup for High Timing Resolution TOF-PET Application 38
High-Channel Count FPGA-based Single-Phase Shift-Clock Fast-Counter Time-to-Digital Converter 36
Digital Architecture for Multi-Channel Histogram Computation in Real-Time 33
Multi-Channel High-Resolution Digital-to-Time Pattern Generator IP-Core for FPGAs and SoCs 31
Fully FPGA-based Innovative Detection Setup for High-Resolution Time Resolved Experiments 31
From Multiphase to Novel Single-Phase Multichannel Shift-Clock Fast Counter Time-to-Digital Converter 30
Design and Implementation of a High-Performance FPGA-bases Digital Instrument for Multi-Channel Time Measurements 29
High-Performance Reconfigurable Digital Instrument for Multi–Channel Time Measurements 26
High-Performance Synchronization Algorithms for multiple Time-to-Digital Converters 23
A Comparison of Voltage-Mode and Time-Based Timing and Energy Read-Out Circuits 23
High-Rate Handling Solution for Multiple Channels, FPGA-Based, Time-to-Digital Converters 20
High Spatial Resolution Detector System Based on Reconfigurable Dual-FPGA Approach for Coincidence Measurements 19
New High-Rate Timestamp Management with Real-Time Configurable Virtual Delay and Dead Time for FPGA-Based Time-to-Digital Converters 19
Compact DSP-based Time-to-Digital Converter IP-Core for Xilinx 7-Series 17
Hybrid Spatial and Temporal Computing Histogramer in Soft Processor Core of a FPGA Device 16
FPGA Real-Time Synchronization Algorithm for Multiple Picoseconds-Precision Time-to-Digital Converters 16
Fully FPGA-based Compact Pulse-Width-Modulated Tunable Threshold Comparator Circuit for Time-to-Digital Converters 15
Timestamp and Amplitude Measurement Solution for Radiation Detectors 14
Novel machine learning-driven optimizing decoding solutions for FPGA-based time-to-digital converters 14
Novel High-Resolution Fully FPGA-based Detection Setup for High-Transfer Rate Time-Resolved Experiments 14
High-Resolution Programmable Delay Line IP-Core based on Digital-to-Time Converter for FPGAs 13
High-Performance Time-to-Digital Converter IP-Core for Xilinx Ultrascale/Ultrascale+ FPGAs 13
USB 3.0 High-Transfer Rate Time-Tagging Module for High-Performance FPGA-based Time-to-Digital Converter 13
High-Precision Digital-to-Time Converter with High Dynamic Range for 28 nm 7-Series Xilinx FPGA and SoC Devices 2
Optimal Implementation of Tapped Delay Line Time-to-Digital Converters in 20 nm Xilinx UltraScale FPGAs 2
Totale 858
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Categoria #
all - tutte 5.040
article - articoli 2.053
book - libri 0
conference - conferenze 2.987
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 10.080
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20218 0 0 0 0 0 0 0 0 0 1 0 7
2021/202222 6 2 2 0 2 0 1 1 1 0 5 2
2022/202385 2 3 3 2 9 4 0 2 30 7 8 15
2023/2024331 24 22 12 25 26 28 25 62 18 33 5 51
2024/2025412 17 42 20 14 175 131 13 0 0 0 0 0
Totale 858