High-Performance Synchronization Algorithms for multiple Time-to-Digital Converters

Nowadays applications like Time-of-Flight Positron Emission Tomography (TOF-PET) and Light Detection and Ranging (LIDAR) require measurement systems which allow to reach very high performance in terms of precision and resolution. In addition to this they need an ever-increasing number of channels working in parallel, even up to hundreds. These requirements lead to a huge area occupation when considering a real-time elaboration on Field Programmable-Gate Array (FPGA), thus, the required system becomes not implementable on a single device, making the classical Time-to-Digital-Converter (TDC) structure no more satisfactory. The solution is given by the implementation of a network of connected TDC instruments based on FPGA. In this contribution, the FPGA structure has been chosen in order to guarantee fast prototyping and flexibility. The idea behind this work is to connect many devices in order to deliver the desired number of channels, while keeping high the performance in terms of resolution and precision. Since the idea is to consider many devices connected together, errors are introduced by mismatches in the clock frequency values, which make timestamps coming from different devices not comparable. Aim of this contribution is the introduction of a synchronization algorithm applied among all the devices, which allows timestamps coming from different devices to be compared without any loss in performance, in terms of precision in the measurement. The algorithm proposed in this work allows the synchronization among devices by means of a self-compensation mechanism on each device. This is possible by adding a channel dedicated to the spread of a low-frequency signal called REF to each TDC, useful for the application of the synchronization algorithm.