CASTELLANA, VITO GIOVANNI

CASTELLANA, VITO GIOVANNI  

DIPARTIMENTO DI ELETTRONICA E INFORMAZIONE (attivo dal 01/01/1900 al 31/12/2012)  

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Titolo Data di pubblicazione Autori File
Accelerating Data Processing at the Edge with Extreme Specialization 1-gen-2022 ANTONINO TUMEOMARCO MINUTOLIVITO GIOVANNI CASTELLANASERENA CURZEL +
An adaptive Memory Interface Controller for improving bandwidth utilization of hybrid and reconfigurable systems 1-gen-2014 CASTELLANA, VITO GIOVANNIFERRANDI, FABRIZIO +
An automated flow for the High Level Synthesis of coarse grained parallel applications 1-gen-2013 CASTELLANA, VITO GIOVANNIFERRANDI, FABRIZIO
Applications Acceleration through Adaptive Hardware Components 1-gen-2013 CASTELLANA, VITO GIOVANNIFERRANDI, FABRIZIO
Considerations on the use of custom accelerators for big data analytics 1-gen-2017 Castellana, Vito GiovanniTumeo, AntoninoMinutoli, MarcoLattuada, MarcoFerrandi, Fabrizio
A Dynamically Scheduled Architecture for the Synthesis of Graph Database Queries 1-gen-2016 CASTELLANA, VITO GIOVANNITUMEO, ANTONINOFERRANDI, FABRIZIOLATTUADA, MARCO +
A dynamically scheduled architecture for the synthesis of graph methods 1-gen-2016 MINUTOLI, MARCOCASTELLANA, VITO GIOVANNITUMEO, ANTONINOLATTUADA, MARCOFERRANDI, FABRIZIO
Efficient synthesis of graph methods: a dynamically scheduled architecture 1-gen-2016 CASTELLANA, VITO GIOVANNITUMEO, ANTONINOLATTUADA, MARCOFERRANDI, FABRIZIO +
Enabling the high level synthesis of data analytics accelerators 1-gen-2016 CASTELLANA, VITO GIOVANNITUMEO, ANTONINOLATTUADA, MARCOFERRANDI, FABRIZIO +
Function Proxies for Improved Resource Sharing in High Level Synthesis 1-gen-2015 CASTELLANA, VITO GIOVANNITUMEO, ANTONINOFERRANDI, FABRIZIO +
High level synthesis of RDF queries for graph analytics 1-gen-2015 CASTELLANA, VITO GIOVANNITUMEO, ANTONINOLATTUADA, MARCOFERRANDI, FABRIZIO +
High-level synthesis of memory bound and irregular parallel applications with Bambu 1-gen-2014 CASTELLANA, VITO GIOVANNITUMEO, ANTONINOFERRANDI, FABRIZIO
Inter-procedural resource sharing in High Level Synthesis through function proxies 1-gen-2015 CASTELLANA, VITO GIOVANNITUMEO, ANTONINOFERRANDI, FABRIZIO +
Real-time considerations for rugged embedded systems 1-gen-2016 TUMEO, ANTONINOPALERMO, GIANLUCAMINUTOLI, MARCOCASTELLANA, VITO GIOVANNIFERRANDI, FABRIZIO +
A Runtime Adaptive Controller for Supporting Hardware Components with Variable Latency 1-gen-2011 PILATO, CHRISTIANCASTELLANA, VITO GIOVANNILOVERGINE, SILVIAFERRANDI, FABRIZIO
Scheduling independent liveness analysis for register binding in high level synthesis 1-gen-2013 CASTELLANA, VITO GIOVANNIFERRANDI, FABRIZIO
Software defined architectures for data analytics 1-gen-2019 Castellana, Vito GiovanniMinutoli, MarcoTumeo, AntoninoLattuada, MarcoFezzardi, PietroFerrandi, Fabrizio