RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

ANTOLA, ANNA MARIA
 Distribuzione geografica
Salva come PNG Salva come JPEG
Continente #
NA - Nord America 2.636
EU - Europa 736
AS - Asia 217
AF - Africa 3
Continente sconosciuto - Info sul continente non disponibili 3
SA - Sud America 3
OC - Oceania 2
Totale 3.600
Salva come PNG Salva come JPEG
Nazione #
US - Stati Uniti d'America 2.572
UA - Ucraina 154
SE - Svezia 124
IT - Italia 99
SG - Singapore 83
DE - Germania 71
AT - Austria 66
CA - Canada 64
VN - Vietnam 60
FI - Finlandia 59
GB - Regno Unito 48
ES - Italia 37
CN - Cina 36
IE - Irlanda 29
IN - India 16
NL - Olanda 15
BE - Belgio 12
JO - Giordania 12
FR - Francia 7
GR - Grecia 6
TR - Turchia 5
RU - Federazione Russa 4
CZ - Repubblica Ceca 3
EU - Europa 3
ID - Indonesia 3
BR - Brasile 2
KR - Corea 2
MU - Mauritius 2
PL - Polonia 2
AU - Australia 1
CI - Costa d'Avorio 1
NZ - Nuova Zelanda 1
PY - Paraguay 1
Totale 3.600
Salva come PNG Salva come JPEG
Città #
Woodbridge 335
Fairfield 298
Santa Clara 291
Ann Arbor 214
Chandler 210
Houston 196
Ashburn 146
Wilmington 131
Seattle 120
Jacksonville 91
Cambridge 80
Vienna 66
Dearborn 58
Singapore 58
Ottawa 56
Boardman 50
Lawrence 45
Málaga 37
Medford 33
Des Moines 31
Dublin 29
Dong Ket 21
Beijing 20
San Diego 20
Milan 16
Amsterdam 14
Helsinki 14
New York 14
Amman 12
Brussels 12
Princeton 12
Munich 9
London 6
North York 6
Auburn Hills 5
Falls Church 5
Norwalk 5
Miami 4
Nanjing 4
Washington 4
Indiana 3
Izmir 3
Jakarta 3
Los Angeles 3
Mountain View 3
Redwood City 3
Verona 3
Brno 2
Guangzhou 2
Hefei 2
Kunming 2
Palazzolo 2
Richland 2
São Paulo 2
Warsaw 2
Abidjan 1
Ajax 1
Atlanta 1
Chengdu 1
Erding 1
Florence 1
Hamilton 1
Hanover 1
Hounslow 1
Jinan 1
Kumar 1
Lanzhou 1
Modena 1
Ningbo 1
Prague 1
Rome 1
San Francisco 1
Seongnam 1
Shanghai 1
Southwark 1
Sunshine Coast 1
Williamston 1
Xian 1
Totale 2.838
Salva come PNG Salva come JPEG
Nome #
An Approach to Fault Tolerance In Architectures for Discrete Fourier Transforms 137
Parallel architectures for elliptic curve cryptoprocessors over binary extension fields 114
A Chip-set for the Generalized Hough Transform 109
High level synthesis through folding of data flow graphs: optimal intra-node scheduling 108
GINGER: a minimizing-effects reprogramming paradigm for distributed sensor networks 107
A novel hardware/software codesign methodology based on dynamic reconfiguration with ImpulseC and CoDeveloper 104
Two-dimensional object recognition on parallel machines 104
Designing and testing of a microprogrammed fault tolerant CPU 102
The hArtes Tool Chain 101
Balancing of fault tolerance in the new version of the FERMI channel chip: a functional evaluation 98
Fault-tolerance in FFT Arrays: Time Redundancy Approaches 98
Definition and evaluation of a transputer-based architecture for image compression and reconstruction 98
Evaluation of FERMI readout of the ATLAS tilecal prototype 95
Evolvable Hardware: a Functional Level Evolution Framework based on Impulse C 93
Tolerance to transient faults in microprogrammed control units 89
Semiconcurrent error detection in data paths 89
A model for the evaluation of fault tolerance in the FERMI system 88
High level architectural synthesis: precedence analysis ad automatic cycle detection 87
Arrays for digital signal processing functions: fault tolerance and functional reconfiguration 86
Fault Tolerance in FFT Arrays: Time redundancy Approaches 85
Modular design methodologies for image processing architectures 81
Policies for fault-tolerance through mixed space- and time- redundancy in semi-systolic FFTs arrays 80
High-Level Synthesis of Data Paths with Concurrent Error Detection 77
Window-based dedicated parallel architectures for image processing 77
Testing and Diagnosis of FFT Arrays 76
Fault identification and fault location in algorithmic flow-driven WSI architectures 75
Transient Fault Management in Systems Based on the AMD 2900 Microprocessors 74
Reconfiguration of binary trees: the flow-driven approach 72
A transputer-based self-tuning edge detection chain 72
Testing approaches for flow graph derived FFTs arrays 71
Dedicated circuits for the generation of windows in image processing architectures 69
DFGs for Synthesis of Alternatives Architectures: Node Activation Synthesis 69
Semi-Concurrent Error Detection in Data Paths 69
Multiple-Transform Pipelines for Image Coding 68
Modular design methodologies for image processing architectures 68
Window-based functional blocks for image processing 63
On-line Dignosis and Reconfiguration of FPGA Systems 61
Concurrent Programming Robustness 58
Optimal Balancing of Acyclic and Cyclic Data Flow Graphs in High Level Architectural Synthesis 56
SAR Real-Time On-Board Processing: the Architecture 56
Backward Error Recovery in Concurrent Environment 51
The Flexibly Dedicated Approach: Reconfigurable Arrays for Low-Level Image Processing 50
Transient Fault Management in Microprogrammed Units: a Software Recovery Approach 48
Radix-r Implementation of Neural Nets 47
Optimizing High-Level Synthesis for Self-Checking Arithmetic Circuits 41
Two-dimensional object recognition on parallel machines 14
Totale 3.635
Salva come PNG Salva come JPEG
Categoria #
all - tutte 11.663
article - articoli 3.964
book - libri 0
conference - conferenze 7.122
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 577
Totale 23.326
Salva come PNG Salva come JPEG


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/2020524 0 0 0 0 0 102 98 62 95 29 113 25
2020/2021476 45 12 81 24 35 38 32 50 27 31 29 72
2021/2022335 18 42 20 4 43 15 27 17 13 13 41 82
2022/2023427 59 50 14 38 40 75 0 21 64 42 19 5
2023/2024159 10 35 5 14 8 29 13 4 0 9 2 30
2024/2025419 7 8 15 7 236 146 0 0 0 0 0 0
Totale 3.635