TASCA, DAVIDE
TASCA, DAVIDE
A 2.9–4.0-GHz Fractional-N Digital PLL With Bang-Bang Phase Detector and 560-fsrms Integrated Jitter at 4.5-mW Power
2011-01-01 Tasca, Davide; Zanuso, Marco; Marzin, Giovanni; Levantino, Salvatore; Samori, Carlo; Lacaita, ANDREA LEONARDO
A Glitch-Corrector Circuit for Low-Spur ADPLLs
2009-01-01 Zanuso, Marco; Levantino, Salvatore; Tasca, Davide; D., Raiteri; Samori, Carlo; Lacaita, ANDREA LEONARDO
A Wideband Fractional-N PLL with Suppressed Charge-Pump Noise and Automatic Loop Filter Calibration
2012-01-01 Levantino, Salvatore; Tasca, Davide; Marzin, Giovanni; Zanuso, Marco; Samori, Carlo; Lacaita, ANDREA LEONARDO
AD-PLL for WiMAX with Digitally-Regulated TDC and Glitch Correction Logic
2010-01-01 Levantino, Salvatore; Zanuso, Marco; Madoglio, Paolo; Tasca, Davide; Samori, Carlo; Lacaita, ANDREA LEONARDO
An All-Digital Architecture for Low-Jitter Regulated Delay Lines
2009-01-01 Levantino, Salvatore; Zanuso, Marco; Tasca, Davide; Samori, Carlo; Lacaita, ANDREA LEONARDO
Low-Power Divider Retiming in a 3-4GHz Fractional-N PLL
2011-01-01 Tasca, Davide; Zanuso, Marco; Levantino, Salvatore; Samori, Carlo; Lacaita, ANDREA LEONARDO
Noise Analysis and Minimization in Bang-Bang Digital PLLs
2009-01-01 Zanuso, Marco; Tasca, Davide; Levantino, Salvatore; Donadel, Andrea; Samori, Carlo; Lacaita, ANDREA LEONARDO