A new CMOS gate structure tolerating all single transistor stuck-on faults and a large set of multiple faults is presented. Such technique is aimed at guaranteeing fault tolerance for a multiple output gate and the fault tolerance property is achieved through an AUED separated encoding of the output functions and the introduction of additional transistors which avoid fault propagation. As an example, Berger code will be discussed.

Fault detection and fault tolerance issues at CMOS level through AUED encoding

BOLCHINI, CRISTIANA;SCIUTO, DONATELLA;
1996-01-01

Abstract

A new CMOS gate structure tolerating all single transistor stuck-on faults and a large set of multiple faults is presented. Such technique is aimed at guaranteeing fault tolerance for a multiple output gate and the fault tolerance property is achieved through an AUED separated encoding of the output functions and the introduction of additional transistors which avoid fault propagation. As an example, Berger code will be discussed.
1996
Proc. IEEE Int. Symposium on Defect and Fault Tolerance in VLSI Systems
0818675454
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/654955
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