The market for embedded applications is facing a growing interest in power consumption issues. The work presented is intended to provide a new model to estimate software-level power consumption of 32-bit microprocessors. This model extends previous ones by considering dynamic inter-instruction effects that take place during code execution, providing a static means to characterize their energy consumption. The model is formally sound; it is conceived for a generic architecture and it has been preliminarily validated on the Intel486/sup TM/ architecture.
Dynamic Modeling of Inter-Instruction Effects for Execution Time Estimation
BRANDOLESE, CARLO;FORNACIARI, WILLIAM;SALICE, FABIO;SCIUTO, DONATELLA
2001-01-01
Abstract
The market for embedded applications is facing a growing interest in power consumption issues. The work presented is intended to provide a new model to estimate software-level power consumption of 32-bit microprocessors. This model extends previous ones by considering dynamic inter-instruction effects that take place during code execution, providing a static means to characterize their energy consumption. The model is formally sound; it is conceived for a generic architecture and it has been preliminarily validated on the Intel486/sup TM/ architecture.File in questo prodotto:
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