Speeding up resting state networks recognition via a hardware accelerator

The human brain is a complex system consisting of interconnections between different neurons and regions creating networks, known as Brain Networks. Of particular relevance in this context are Resting State Networks (RSNs), which are synchronous fluctuations between spatially distinct regions, occurring in the absence of a task or stimulus. Neuroscientists have identified alterations in RSNs in many neurodegenerative diseases, thus a long-Term analysis of them is fundamental to monitor alterations in brain functional connectivity. However, the statistical tools in charge of analyzing RSNs currently fail in reaching significant levels of throughput, due to the huge amount of data to process. For this reason, this paper presents a hardware acceleration on FPGA design of the Independent Component Analysis (ICA), a state-of-The-Art statistical method for RSNs recognition, in order to accelerate the data analysis process. We evaluated and deployed our implementation on Amazon F1 instances. The experimental evaluation shows that our hardware implementation is able to outperform GIFT, one of the most commonly used tools to identify RSNs, by a factor of 5x.