ERDEM, AHMET

	Nome completo
	
					ERDEM, AHMET
				
	Afferenza
	
					DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA
				
	Pagina personale
	
Scheda docente sul sito di Ateneo

Mostra records

Risultati 1 - 5 di 5 (tempo di esecuzione: 0.001 secondi).

A tile-based fused-layer approach to accelerate DCNNs on low-density FPGAs

2019-01-01 Erdem, A.; Babic, D.; Silvano, C.

A Tile-based Fused-layer CNN Accelerator for FPGAs

2020-01-01 Indirli, Fabrizio; Erdem, Ahmet; Silvano, Cristina

Design Space Exploration for Orlando Ultra Low-Power Convolutional Neural Network SoC

2018-01-01 Erdem, Ahmet; Silvano, Cristina; Boesch, Thomas; Ornstein, Andrea; Singh, Surinder-Pal; Desoli, Giuseppe

Design space pruning and computational workload splitting for autotuning OpenCL applications

2018-01-01 Erdem, Ahmet; Gadioli, Davide; Palermo, Gianluca; Silvano, Cristina

Parallelized Convolutions for Embedded Ultra Low Power Deep Learning SoC

2018-01-01 Cunial, L.; Erdem, A.; Silvano, C.; Falchetto, M.; Ornstein, A. C.; Plebani, E.; Desoli, G.; Pau, D.

Titolo	Data di pubblicazione	Autori
A tile-based fused-layer approach to accelerate DCNNs on low-density FPGAs	1-gen-2019	Erdem A.Babic D.Silvano C.
A Tile-based Fused-layer CNN Accelerator for FPGAs	1-gen-2020	Indirli, FabrizioErdem, AhmetSilvano, Cristina
Design Space Exploration for Orlando Ultra Low-Power Convolutional Neural Network SoC	1-gen-2018	ERDEM, AHMETSilvano, CristinaBoesch, ThomasOrnstein, AndreaSingh, Surinder-PalDesoli, Giuseppe + -
Design space pruning and computational workload splitting for autotuning OpenCL applications	1-gen-2018	Erdem, AhmetGadioli, DavidePalermo, GianlucaSilvano, Cristina
Parallelized Convolutions for Embedded Ultra Low Power Deep Learning SoC	1-gen-2018	Cunial L.Erdem A.Silvano C.Falchetto M.Ornstein A. C.Plebani E.Desoli G.Pau D. + -