We present a novel integrated circuit for subnanosecond gating of InGaAs/InP single-photon avalanche diodes (SPADs). It enables the detector in well-defined time intervals (down to 500 ps) and strongly reduces the afterpulsing effect. It includes a fast pulser with rising/falling edge shorter than 300 ps (20%-80%), a wideband comparator and hold-off logic circuitry. The fast avalanche quenching reduces the charge flow in the SPAD, thus decreasing the afterpulsing, a detrimental effect that limits the maximum count rate of InGaAs/InP SPADs. The wideband SiGe comparator guarantees very low timing jitter of the acquired waveforms: <100 ps (FWHM) at 5 V excess bias voltage, when operated with InGaAs/InP SPAD, whereas we estimate that the time jitter of the circuit is < 30 ps.
Integrated Circuit for Subnanosecond Gating of InGaAs/InP SPAD
RUGGERI, ALESSANDRO;CICCARELLA, PIETRO;VILLA, FEDERICA ALBERTA;ZAPPA, FRANCO;TOSI, ALBERTO
2015-01-01
Abstract
We present a novel integrated circuit for subnanosecond gating of InGaAs/InP single-photon avalanche diodes (SPADs). It enables the detector in well-defined time intervals (down to 500 ps) and strongly reduces the afterpulsing effect. It includes a fast pulser with rising/falling edge shorter than 300 ps (20%-80%), a wideband comparator and hold-off logic circuitry. The fast avalanche quenching reduces the charge flow in the SPAD, thus decreasing the afterpulsing, a detrimental effect that limits the maximum count rate of InGaAs/InP SPADs. The wideband SiGe comparator guarantees very low timing jitter of the acquired waveforms: <100 ps (FWHM) at 5 V excess bias voltage, when operated with InGaAs/InP SPAD, whereas we estimate that the time jitter of the circuit is < 30 ps.File | Dimensione | Formato | |
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2015 - Ruggeri - Integrated Circuit for Subnanosecond Gating of InGaAs-InP SPAD.pdf
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Integrated Circuit for Sub-Nanosecond Gating - manuscript2.pdf
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