In this paper we present the development of an integrated circuit and of a data acquisition system for the readout of silicon drift detector (SDD) arrays to be coupled to scintillators for gamma-ray spectroscopy in the range 150 kev -15 Mev. The final goal is to develop a spectrometer based on an array of 81 silicon drift detectors (SDDs) coupled to a labr3:ce scintillator. The SDD photo-detectors are readout by 3 ASICs (27-channel each) and digitalized by a custom data acquisition (DAQ). Every channel includes a high order semi-Gaussian shaper amplifier with selectable gains and peaking times (from 2 μs up to 6 μs), a baseline holder and a peak stretcher. The ASIC also includes 27:1 analog multiplexer, custom digital control logic and an output amplifier. The DAQ board converts all the data coming from the three ASICs, with a resolution of 16 bits, and sends them to the host pc via an Ethernet interface. Main features of the electronic digital acquisition system are re-configurability, linearity, low noise and processing data rate through hardware and firmware architecture solutions that also allow the system to operate in presence of disturbances and electromagnetic noise.

Readout Electronics and DAQ System for Silicon Drift Detector Arrays in Gamma Ray Spectroscopy Applications

QUAGLIA, RICCARDO;ABBA, ANDREA;BOMBELLI, LUCA;BUSCA, PAOLO;CAPONIO, FRANCESCO;CUSIMANO, ALBERTO;FIORINI, CARLO ETTORE;GERACI, ANGELO;PELOSO, ROBERTA
2012

Abstract

In this paper we present the development of an integrated circuit and of a data acquisition system for the readout of silicon drift detector (SDD) arrays to be coupled to scintillators for gamma-ray spectroscopy in the range 150 kev -15 Mev. The final goal is to develop a spectrometer based on an array of 81 silicon drift detectors (SDDs) coupled to a labr3:ce scintillator. The SDD photo-detectors are readout by 3 ASICs (27-channel each) and digitalized by a custom data acquisition (DAQ). Every channel includes a high order semi-Gaussian shaper amplifier with selectable gains and peaking times (from 2 μs up to 6 μs), a baseline holder and a peak stretcher. The ASIC also includes 27:1 analog multiplexer, custom digital control logic and an output amplifier. The DAQ board converts all the data coming from the three ASICs, with a resolution of 16 bits, and sends them to the host pc via an Ethernet interface. Main features of the electronic digital acquisition system are re-configurability, linearity, low noise and processing data rate through hardware and firmware architecture solutions that also allow the system to operate in presence of disturbances and electromagnetic noise.
2012 IEEE Nuclear Science Symposiwn and Medical Imaging Conference Record (NSS/MIC)
978-1-4673-2028-3
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11311/765716
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