This paper presents a digital background linearization technique for high-speed Nyquist-rate digital-to-analog Converters (DACs), based on the use of a least-mean-square (LMS) multipath adaptive filter that continuously measures and cancels non-linearity arising from static errors. In contrast to previously-published correlation-based techniques, the proposed method is not limited to the cancellation of component mismatches, but it performs the correction of the overall static characteristic regardless of the source of non-linearities. It requires only an additional low-speed accurate DAC and moderate digital hardware complexity, avoiding the need for a multibit analog-to-digital converter. The effectiveness of the proposed technique applied to a current-steering DAC suggests that it could be useful to overcome the typical high-speed DAC trade-off, allowing the elimination of static non-linearity errors without sacrificing dynamic performances.

Background adaptive linearization of high-speed digital-to-analog converters

FENAROLI, ANDREA;LEVANTINO, SALVATORE;SAMORI, CARLO;LACAITA, ANDREA LEONARDO
2013-01-01

Abstract

This paper presents a digital background linearization technique for high-speed Nyquist-rate digital-to-analog Converters (DACs), based on the use of a least-mean-square (LMS) multipath adaptive filter that continuously measures and cancels non-linearity arising from static errors. In contrast to previously-published correlation-based techniques, the proposed method is not limited to the cancellation of component mismatches, but it performs the correction of the overall static characteristic regardless of the source of non-linearities. It requires only an additional low-speed accurate DAC and moderate digital hardware complexity, avoiding the need for a multibit analog-to-digital converter. The effectiveness of the proposed technique applied to a current-steering DAC suggests that it could be useful to overcome the typical high-speed DAC trade-off, allowing the elimination of static non-linearity errors without sacrificing dynamic performances.
2013 IEEE International Symposium on Circuits and Systems (ISCAS)
9781467357609
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/743172
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