Remarkable advances in semiconductor technology as long as improvements in device design resulted in today's Silicon Single Photon Avalanche Diodes (SPADs) that are widely used in many demanding applications thanks to their excellent performance. However a lot of work is still be done in order to simultaneously meet three requirements crucial in a large number of applications, i.e. high Photon Detection Efficiency (PDE), good timing resolution and suitability for the fabrication of arrays. We will report on our advances on the development of a new planar silicon SPAD with high photon detection efficiency (PDE) and good photon timing resolution. A thick epitaxial layer allows for the absorption of a significant fraction of photons even at the longer wavelengths, while a suitable electric field profile limits the breakdown voltage value and the timing jitter; biased guard rings are also included to prevent edge breakdown. Preliminary results show that the new devices can attain a PDE as high as 30% at a wavelength of 800nm while keeping photon detection jitter below 100ps.
Planar silicon SPADs with improved photon detection efficiency
GULINATTI, ANGELO;PANZERI, FRANCESCO;RECH, IVAN;GHIONI, MASSIMO ANTONIO;COVA, SERGIO
2011-01-01
Abstract
Remarkable advances in semiconductor technology as long as improvements in device design resulted in today's Silicon Single Photon Avalanche Diodes (SPADs) that are widely used in many demanding applications thanks to their excellent performance. However a lot of work is still be done in order to simultaneously meet three requirements crucial in a large number of applications, i.e. high Photon Detection Efficiency (PDE), good timing resolution and suitability for the fabrication of arrays. We will report on our advances on the development of a new planar silicon SPAD with high photon detection efficiency (PDE) and good photon timing resolution. A thick epitaxial layer allows for the absorption of a significant fraction of photons even at the longer wavelengths, while a suitable electric field profile limits the breakdown voltage value and the timing jitter; biased guard rings are also included to prevent edge breakdown. Preliminary results show that the new devices can attain a PDE as high as 30% at a wavelength of 800nm while keeping photon detection jitter below 100ps.File | Dimensione | Formato | |
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2011_PhotonicsWest_Gulinatti_PlanarSiliconSpadWithImprovedPde.PDF
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