A minimal and scalable architecture for Hardware-in-the-Loop simulations of railway signalling systems

Railway signalling systems are pivotal in ensuring the safe and effi-cient management of train operations. This paper presents a simulation-based framework for analyzing the operational performance of two predominant sig-nalling paradigms, namely Fixed Block (FB) and Moving Block (MB) systems. Focus is posed on the system performance in terms of energetic efficiency, delay management, traffic capacity, and motion regularity. The developed environ-ment, implemented in Matlab® and Simulink®, combines macroscopic and mi-croscopic modelling to strike a balance between simulation fidelity and compu-tational efficiency. A Hardware-in-the-Loop (HiL) architecture is also intro-duced, enabling real-time testing of onboard subsystems via physical deployment of one train’s On-Board Unit (OBU) onto a dedicated hardware platform. More-over, by introducing a high-performance computer, real-time simulation is ena-bled through a co-simulation setup. The framework is applied to a real-world case study on a main railway line in Northern Italy. Three performance indicators, Traffic Capacity (TC), Motion Regularity (MR), and Energy Consumption (EC), are defined and evaluated under both FB and MB systems. Results show that MB signalling enables improved throughput and smoother train operations under re-duced headways, at the cost of increased energy consumption, demonstrating its advantages and disadvantages for high-demand railway networks.