ScaDL 2022 Invited Talk 1: Design of secure power monitors for accelerators, by exploiting ML techniques, in the Euro-HPC TEXTAROSSA project

The evolution of High Performance Computing (HPC) has to face with several obstacles, including power/thermal management of the cores and the presence of heterogeneous computing platforms. Within the Euro-HPC project TEXTAROSSA, started in spring 2021, several HPC applications exploiting AI and with the need of processing big chunks of data in a secure context, are properly accelerated by leveraging ad-hoc designed accelerators to be implemented in hardware. Such customized heterogeneity of execution has many benefits, but increases the problem of power management, since the accelerators, possibly generated through high-level-synthesis, are neither providing run-time information on their power consumption, nor allows to control the security of the information flow against implementation attacks. In such scenario, any global power manager / resource orchestrator, can operate only with a partial picture of the overall systems and not in real-time, with the risk of being trapped in poor power optimizations and unbalanced resource exploitation. The goal of the talk is to show how is possible to exploit popular ML techniques for a twofold purpose: •Automatically generate an on-line power monitor, to augment the hardware description of any piece of hardware, in particular that of cores and accelerators, capable to provide on-line power estimated in less that few milliseconds. •Select, in the space of all the possible power monitors, those that are not leaking information that can be used to mount side-channel attacks.