Optimum module design I: electrothermal

Silicon carbide (SiC) power transistors often operate under critical conditions with a large amount of heat generation, which may lead to reliability degradation or even to an irreversible device failure in harsh cases. As a consequence, reliable simulation tools accounting for electrothermal (ET) effects are highly desired to define the thermal dissipation constraints and optimize the design of the transistor layout and/or of the cooling system. However, this task is far from trivial due to multiple reasons: (i) trustworthy ET simulations of SiC transistors can in principle be obtained only by using device models that accurately describe the key physical parameters and their temperature dependences, which are rather different compared with traditional silicon devices; (ii) the tools must be suited to describe also temperature and current nonuniformities, which are often responsible for the safe operating area shrinking of multicellular transistors; (iii) it is obvious that 3-D approaches accounting for the distributed heat dissipation (i.e., for a sufficiently high number of heat sources) over the geometrically complex power device can be very resource-hungry and prone to convergence failures, especially if dynamic simulations under critical conditions have to be performed. In this chapter, an innovative approach is proposed, the aim of which is to optimize the trade-off between computational efficiency and accuracy when handling problems with a relatively large amount of heat sources. The proposed strategy relies on a fully circuital representation of the whole device, wherein the equivalent network emulating the power-temperature feedback is obtained from a dynamic compact thermal model (DCTM), in turn automatically derived from an exceptionally accurate finite-element method (FEM) description of the device. A multicellular 4H-SiC power MOSFET operated under dc, short-circuit (SC), and unclamped inductive switching (UIS) conditions is considered as a case study.