Applications of energy spectroscopy of photons and electrons at high count rates often demand for highly pixelated detectors in order to reduce the count rate per pixel. Nevertheless, the increased number of detectors increases the complexity of the readout electronics, requiring Data Acquisition systems (DAQ) able to perform fast multi-channel analysis. In the framework of the TRISTAN project for the search of Sterile neutrino in the keV-scale, we present SFERA-TAC, a 16-channel Analog Pulse Processing integrated circuit for the readout of Silicon Drift Detectors. SFERA-TAC implements 16 distinct 9th order semi-Gaussian shapers, whose output is collected by a peak stretcher circuitry and multiplexed to the DAQ system. The analog information of the events energy is completed by a timestamp of the events detection, given by its integrated Time-to-Amplitude Converter. The timing of events is necessary, for instance, for charge sharing and backscattering analysis and reconstruction. Together with the ASIC, we present a Data Acquisition Platform (Argo) that integrates SFERA-TAC ASIC (16 input channels), high linearity ADCs and an FPGA module.

A 16-Channel Integrated Pulse Processor with Timing Capability for Readout of Large Arrays of Silicon Drift Detectors

P. King;A. Amirkhani;M. Gugiatti;M. Carminati;C. E. Fiorini
2020

Abstract

Applications of energy spectroscopy of photons and electrons at high count rates often demand for highly pixelated detectors in order to reduce the count rate per pixel. Nevertheless, the increased number of detectors increases the complexity of the readout electronics, requiring Data Acquisition systems (DAQ) able to perform fast multi-channel analysis. In the framework of the TRISTAN project for the search of Sterile neutrino in the keV-scale, we present SFERA-TAC, a 16-channel Analog Pulse Processing integrated circuit for the readout of Silicon Drift Detectors. SFERA-TAC implements 16 distinct 9th order semi-Gaussian shapers, whose output is collected by a peak stretcher circuitry and multiplexed to the DAQ system. The analog information of the events energy is completed by a timestamp of the events detection, given by its integrated Time-to-Amplitude Converter. The timing of events is necessary, for instance, for charge sharing and backscattering analysis and reconstruction. Together with the ASIC, we present a Data Acquisition Platform (Argo) that integrates SFERA-TAC ASIC (16 input channels), high linearity ADCs and an FPGA module.
IEEE NSS/MIC 2020 Conference Records
9781728176932
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11311/1170672
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