In the contribution ″Fully Programmable System for Multi-Channel Experiments Targeting to Time Measurement at High Performance″ presented at 2017 Nuclear Science Symposium, we introduced a new instrument for time measurements in a prototype version. In this contribution we present the evolution of this instrument in its firmware and software parts, aimed at obtaining a processing architecture flexible, modular and migratable among different host devices.Main feature of the system is the multi-channel operating mode, up to 16 parallel inputs at maximum rate of 45 MHz per channel, with resolution of 250 fs and single channel precision below 12 ps r.m.s., over hardware full-scale range of 10.3 s extendable to some days simply via software.Time measures are performed by a Time-to-Digital Converter (TDC) structured as IP-Core compatible with Xilinx Field Programmable Gate Arrays (FPGAs) and Systems-on-Chips (SoCs) of last generation (28-nm 7-Series, 20-nm UltraScale, and 16-nm UltraScale+). The firmware composed of IP-Cores is more flexible with respect to a standard Hardware Description Language (HDL) code and allows the user inserting custom modules for adapting the instrument to specific purposes without putting at risk the performance of the TDC.Moreover, the most important feature of this organization in IP-Cores is that the firmware can be hosted in different FPGA/SoC modules, guaranteeing not only firmware and software, but also hardware re-configurability of the instrument.

All-Digital Fully-Configurable Instrument for Multi-Channel Time Measurements at High Performance

Garzetti, F.;Lusardi, N.;Geraci, A.
2018-01-01

Abstract

In the contribution ″Fully Programmable System for Multi-Channel Experiments Targeting to Time Measurement at High Performance″ presented at 2017 Nuclear Science Symposium, we introduced a new instrument for time measurements in a prototype version. In this contribution we present the evolution of this instrument in its firmware and software parts, aimed at obtaining a processing architecture flexible, modular and migratable among different host devices.Main feature of the system is the multi-channel operating mode, up to 16 parallel inputs at maximum rate of 45 MHz per channel, with resolution of 250 fs and single channel precision below 12 ps r.m.s., over hardware full-scale range of 10.3 s extendable to some days simply via software.Time measures are performed by a Time-to-Digital Converter (TDC) structured as IP-Core compatible with Xilinx Field Programmable Gate Arrays (FPGAs) and Systems-on-Chips (SoCs) of last generation (28-nm 7-Series, 20-nm UltraScale, and 16-nm UltraScale+). The firmware composed of IP-Cores is more flexible with respect to a standard Hardware Description Language (HDL) code and allows the user inserting custom modules for adapting the instrument to specific purposes without putting at risk the performance of the TDC.Moreover, the most important feature of this organization in IP-Cores is that the firmware can be hosted in different FPGA/SoC modules, guaranteeing not only firmware and software, but also hardware re-configurability of the instrument.
2018
2018 IEEE Nuclear Science Symposium and Medical Imaging Conference Proceedings (NSS/MIC)
978-1-5386-8494-8
Time measurement, Microprogramming, Instruments, Field programmable gate arrays, Temperature measurement, Hardware, Software, sezele
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1103830
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