System-on-Chip Linux-based Platform for High-Performance Time-to-Digital Conversion

This contribution presents a complete hardware, firmware and software platform for high-resolution time measurements. The implementation is into Programmable Logic and Processing System sections of a Xilinx System-on-Chip, hosted on a custom carrier board together with front-end circuits, communication interfaces (USB, Ethernet) and power resources. The platform is provided with a software for system configuration, management of output measures.The internal Block-Design IP-Core offers several parameters for customization purpose, also allowing a settable trade-off between saving of resources and performance, with time precision ranging from 12 ps r.m.s. to 50 ps r.m.s. and resolution from 1 ps to 100 ps, configurable number of channels (from 2 to 16) and a rate of measurements up to 45 MHz per channel. The area occupation per channel ranges from 256 SLICEs for a resource-saving configuration to 2048 SLICESs for optimizing performance. Additionally, the IP-Core has a very low Cross-Talk (< 3 ps r.m.s.) and temperature drift (286 fs/°C in the 0 °C - 70 °C operating range).The system is modular, permitting the integration of custom user-made software or firmware modules both in the form of spatial and temporal computing algorithms.