Systems-on-chip are increasingly designed at the system level by combining synthesizable IP components that operate concurrently while interacting through communication channels. CAD-tool vendors support this System-Level Design approach with high-level synthesis tools and libraries of interface primitives implementing the communication protocols. These interfaces absorb timing differences in the hardware-component implementations, thus enabling compositional design. However, they introduce also new challenges in terms of functional correctness and performance optimization. We propose a methodology that combines performance analysis and optimization algorithms to automatically address the issues that SoC designers may accidentally introduce when assembling components that are specified at the system level. Copyright 2014 ACM.

A design methodology for compositional high-level synthesis of communication-centric SoCs

Pilato, Christian;
2014-01-01

Abstract

Systems-on-chip are increasingly designed at the system level by combining synthesizable IP components that operate concurrently while interacting through communication channels. CAD-tool vendors support this System-Level Design approach with high-level synthesis tools and libraries of interface primitives implementing the communication protocols. These interfaces absorb timing differences in the hardware-component implementations, thus enabling compositional design. However, they introduce also new challenges in terms of functional correctness and performance optimization. We propose a methodology that combines performance analysis and optimization algorithms to automatically address the issues that SoC designers may accidentally introduce when assembling components that are specified at the system level. Copyright 2014 ACM.
2014
Proceedings of the ACM/IEEE Design Automation Conference
9781479930173
High-Level Synthesis; SystemC; Computer Science Applications1707 Computer Vision and Pattern Recognition; Control and Systems Engineering; Electrical and Electronic Engineering; Modeling and Simulation
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1069643
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