Hardware and Software Co-Design of a System-On-Chip for Real-Time Bidirectional Transfer and Processing of Data from a Time-to-Digital Converter

In this contribution, we present the implementation of a hardware and software co-design system for real-time bidirectional data transfer and processing on a System-of-Chip (SoC) platform, the ZedBoard™ development kit, for timing measurements performed by a multi-channel, high-performance Tapped Delay-Line Time-to-Digital Converter implemented in the Programmable Logic (PL) section of the Zynq®-7 XC7Z020 hosted on board. The Time-to-Digital Converter is an IP-core characterized by area saving architecture, average resolution and full-scale-range completely and independently tunable from 20ps to 2ps and from 40ns to 10.7s respectively. Moreover, the number of channels implemented is programmable from 2 up to 8 at user level.