In this contribution, we introduce a new hardware/firmware/software bundle for experiments in which high-performance time resolving is a primary request. Main features of the global system are multi-channel operation up to 16 parallel measures with resolution of 250fs and precision below 12ps r.m.s. with hardware full-scale-range of 10.3s, and the possibility of enabling different time tagging techniques that can indefinitely extend the full-scale-range via software. Moreover, each channel can support multi-hit measurements with a maximum rate of 20MHz. Time measurements are performed by a multi-channel, highperformance Tapped Delay-Line Time-to-Digital Converter instantiated as HDL IP-Core Module (TDC IP-Core) in a Serie-7 28nm Xilinx FPGA module hosted on a custom hardware. The firmware and the software are modularly structured, meaning that each module has firmware and software images that split the processing in parallel and temporal computing segments.

Fully Programmable System for Multi-Channel Experiments Targeting to Time Measurement at High Performance

N. Lusardi;GARZETTI, FABIO;A. Geraci
2017-01-01

Abstract

In this contribution, we introduce a new hardware/firmware/software bundle for experiments in which high-performance time resolving is a primary request. Main features of the global system are multi-channel operation up to 16 parallel measures with resolution of 250fs and precision below 12ps r.m.s. with hardware full-scale-range of 10.3s, and the possibility of enabling different time tagging techniques that can indefinitely extend the full-scale-range via software. Moreover, each channel can support multi-hit measurements with a maximum rate of 20MHz. Time measurements are performed by a multi-channel, highperformance Tapped Delay-Line Time-to-Digital Converter instantiated as HDL IP-Core Module (TDC IP-Core) in a Serie-7 28nm Xilinx FPGA module hosted on a custom hardware. The firmware and the software are modularly structured, meaning that each module has firmware and software images that split the processing in parallel and temporal computing segments.
2017
IEEE Transactions on Nuclear Science ( Volume: 64, Issue: 9, Sept. 2017 )
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1063811
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