In this contribution, we present a high-resolution and multi-channel Time-to-Digital Converter (TDC) realized on a proprietary application-oriented FPGA-Mezzanine-Card (FMC) connected with a general-purpose Advanced-Mezzanine-Card (AMC) carrier board for MTCA.4 standard that hosts a Xilinx Virtex5 70T in 67 nm technology with 10000 slices. The system measures at the same time up to 16 input channels with resolution of 10 ps, 10.7 s full-scale range, and precision less than 15 ps r.m.s. Moreover, each channel supports multi-hit measure rate up to 10 MHz keeping constant the performance. The TDC is implemented into the FPGA device hosted in the FMC daughter board that is a 28 nm Xilinx Artix®-7 XC7A200T. The inputs to the TDC are signals conditioned by an analog front-end composed of 16 comparators, whose thresholds are programmable via software. The measurement is totally performed and decoded into the FPGA. Settings of the TDC and communication of the measure results are performed via FMC to the carrier board and read-out to the AMC through a PCI-Express link.
Multi-Channel Time-to-Digital Converter for MTCA.4 Standard in FPGA
N. Lusardi;F. Garzetti;A. Geraci;
2017-01-01
Abstract
In this contribution, we present a high-resolution and multi-channel Time-to-Digital Converter (TDC) realized on a proprietary application-oriented FPGA-Mezzanine-Card (FMC) connected with a general-purpose Advanced-Mezzanine-Card (AMC) carrier board for MTCA.4 standard that hosts a Xilinx Virtex5 70T in 67 nm technology with 10000 slices. The system measures at the same time up to 16 input channels with resolution of 10 ps, 10.7 s full-scale range, and precision less than 15 ps r.m.s. Moreover, each channel supports multi-hit measure rate up to 10 MHz keeping constant the performance. The TDC is implemented into the FPGA device hosted in the FMC daughter board that is a 28 nm Xilinx Artix®-7 XC7A200T. The inputs to the TDC are signals conditioned by an analog front-end composed of 16 comparators, whose thresholds are programmable via software. The measurement is totally performed and decoded into the FPGA. Settings of the TDC and communication of the measure results are performed via FMC to the carrier board and read-out to the AMC through a PCI-Express link.File | Dimensione | Formato | |
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