In this paper, the effects of undesired asymmetry and nonuniformity on differential line (DL) circuits are modeled as deviations from the ideal, nominal geometrical characteristics of a perfectly symmetrical and uniform DL, whose performance is taken as reference. To this end, the involved multiconductor transmission line equations are solved in the modal domain by a decoupled approach based on the perturbation of the p.u.l. parameters of the ideal DL on one hand, and on the assumption of weak coupling between the corresponding differential and common mode equivalent circuits on the other. Three illustrative DL structures are considered and analytically solved, with the objective to put in evidence the effects of the aforesaid geometrical nonidealities on the degradation of the differential mode signal propagating along the DL as well as on the generation of undesired common mode currents/voltages. A circuit interpretation of the involved phenomena is provided, and the relevant geometrical parameters are identified.

Effects of undesired asymmetries and nonuniformities in differential lines

Grassi, Flavia;Liu, Xiaokang;Wu, Xinglong;Pignari, Sergio A.
2017-01-01

Abstract

In this paper, the effects of undesired asymmetry and nonuniformity on differential line (DL) circuits are modeled as deviations from the ideal, nominal geometrical characteristics of a perfectly symmetrical and uniform DL, whose performance is taken as reference. To this end, the involved multiconductor transmission line equations are solved in the modal domain by a decoupled approach based on the perturbation of the p.u.l. parameters of the ideal DL on one hand, and on the assumption of weak coupling between the corresponding differential and common mode equivalent circuits on the other. Three illustrative DL structures are considered and analytically solved, with the objective to put in evidence the effects of the aforesaid geometrical nonidealities on the degradation of the differential mode signal propagating along the DL as well as on the generation of undesired common mode currents/voltages. A circuit interpretation of the involved phenomena is provided, and the relevant geometrical parameters are identified.
2017
ELETTRICI
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1044741
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