FERRANDI, FABRIZIO
 Distribuzione geografica
Continente #
NA - Nord America 7.854
EU - Europa 7.115
AS - Asia 3.664
SA - Sud America 211
AF - Africa 191
OC - Oceania 89
Continente sconosciuto - Info sul continente non disponibili 22
Totale 19.146
Nazione #
US - Stati Uniti d'America 7.451
IT - Italia 1.896
DE - Germania 1.497
CN - Cina 1.293
FR - Francia 607
RU - Federazione Russa 583
IN - India 500
GB - Regno Unito 438
CZ - Repubblica Ceca 370
HK - Hong Kong 346
NL - Olanda 343
CA - Canada 333
JP - Giappone 331
UA - Ucraina 240
IR - Iran 199
SG - Singapore 184
KR - Corea 171
CH - Svizzera 140
ES - Italia 127
TW - Taiwan 125
PT - Portogallo 112
TR - Turchia 105
BR - Brasile 96
GR - Grecia 96
SE - Svezia 94
VN - Vietnam 94
FI - Finlandia 87
IE - Irlanda 79
AT - Austria 78
PL - Polonia 72
RO - Romania 71
AU - Australia 68
PK - Pakistan 66
ZA - Sudafrica 51
EG - Egitto 50
MX - Messico 49
ID - Indonesia 48
BE - Belgio 46
MY - Malesia 34
RS - Serbia 34
AR - Argentina 32
IL - Israele 32
CL - Cile 27
TN - Tunisia 27
PY - Paraguay 26
DZ - Algeria 21
NZ - Nuova Zelanda 21
DK - Danimarca 18
LK - Sri Lanka 18
NO - Norvegia 18
EU - Europa 17
SA - Arabia Saudita 17
CR - Costa Rica 14
LT - Lituania 14
PH - Filippine 14
HU - Ungheria 12
IQ - Iraq 12
AE - Emirati Arabi Uniti 11
BD - Bangladesh 11
MA - Marocco 11
TH - Thailandia 11
BG - Bulgaria 10
CO - Colombia 9
BY - Bielorussia 7
PE - Perù 7
ET - Etiopia 6
A1 - Anonimo 5
HR - Croazia 5
JO - Giordania 5
NG - Nigeria 5
NP - Nepal 5
UY - Uruguay 5
VE - Venezuela 5
AM - Armenia 4
AZ - Azerbaigian 4
CY - Cipro 4
EE - Estonia 4
GH - Ghana 4
LB - Libano 4
MG - Madagascar 4
SI - Slovenia 4
AL - Albania 3
EC - Ecuador 3
KG - Kirghizistan 3
KZ - Kazakistan 3
LU - Lussemburgo 3
PS - Palestinian Territory 3
ZM - Zambia 3
BA - Bosnia-Erzegovina 2
BH - Bahrain 2
BZ - Belize 2
MD - Moldavia 2
PR - Porto Rico 2
SK - Slovacchia (Repubblica Slovacca) 2
UG - Uganda 2
ZW - Zimbabwe 2
AF - Afghanistan, Repubblica islamica di 1
BB - Barbados 1
BO - Bolivia 1
BS - Bahamas 1
Totale 19.135
Città #
Houston 596
Milan 538
Ann Arbor 451
Fairfield 430
Ashburn 391
Buffalo 287
Wilmington 279
Woodbridge 264
Beijing 261
Seattle 237
Santa Cruz 222
Cambridge 170
Shanghai 151
San Jose 135
Los Angeles 130
Singapore 122
New York 111
Guangzhou 108
Central 99
Dalian 96
Richland 95
Tokyo 92
Chicago 91
Toronto 85
Bangalore 83
San Diego 82
Redmond 79
Bengaluru 78
Boardman 75
Wuhan 74
Ottawa 73
Dublin 72
Paris 70
London 69
Nürnberg 69
University Park 69
Hangzhou 66
Zurich 66
Mountain View 64
Xian 64
Darmstadt 56
Portland 55
Sunnyvale 51
Vienna 48
Dong Ket 47
Las Vegas 47
Moscow 47
Taipei 47
Amsterdam 45
Central District 45
Turin 45
Rome 44
Philadelphia 43
Athens 41
Nanjing 41
Bergamo 40
Hyderabad 40
Dresden 39
Saint Petersburg 39
Islamabad 38
Montreal 38
Phoenix 38
Helsinki 37
Berlin 36
Modena 36
Muizenberg 35
Atlanta 34
Changsha 34
Santa Clara 34
Mumbai 33
Munich 32
Hong Kong 31
New Delhi 31
Jakarta 30
Gainesville 29
Alfa 28
Basking Ridge 28
Istanbul 28
Jersey City 28
Seoul 28
San Francisco 27
Delhi 26
Ulju-gun 26
Grenoble 25
Hanoi 25
Norwalk 25
Porto 25
Seongnam 25
Sydney 25
Cairo 24
Dallas 24
Boulder 23
Bremen 23
Duncan 23
Fremont 23
Leawood 23
Madrid 22
Melbourne 22
Tehran 22
Columbus 21
Totale 8.619
Nome #
A Survey and Evaluation of FPGA High-Level Synthesis Tools, file e0c31c09-de59-4599-e053-1705fe0aef77 2.885
Invited: Bambu: an Open-Source Research Framework for the High-Level Synthesis of Complex Applications, file e0c31c12-1f74-4599-e053-1705fe0aef77 1.282
Inter-procedural resource sharing in High Level Synthesis through function proxies, file e0c31c09-2b49-4599-e053-1705fe0aef77 877
Code transformations based on speculative SDC scheduling, file e0c31c09-239e-4599-e053-1705fe0aef77 654
Svelto: High-Level Synthesis of Multi-Threaded Accelerators for Graph Analytics, file e0c31c10-c718-4599-e053-1705fe0aef77 597
Exploiting Vectorization in High Level Synthesis of Nested Irregular Loops, file e0c31c0a-5873-4599-e053-1705fe0aef77 575
High level synthesis of RDF queries for graph analytics, file e0c31c09-21d3-4599-e053-1705fe0aef77 558
Computer Assisted Design and Integration of FPGA Accelerators in Aerospace Systems, file e0c31c09-2274-4599-e053-1705fe0aef77 557
Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators, file e0c31c12-99f3-4599-e053-1705fe0aef77 510
Using Efficient Path Profiling to Optimize Memory Consumption of On-Chip Debugging for High-Level Synthesis, file e0c31c0b-1ca0-4599-e053-1705fe0aef77 502
Efficient synthesis of graph methods: a dynamically scheduled architecture, file e0c31c09-f76e-4599-e053-1705fe0aef77 470
Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems, file e0c31c09-2d2b-4599-e053-1705fe0aef77 444
Performance Estimation for Task Graphs Combining Sequential Path Profiling and Control Dependence Regions, file e0c31c09-1b4f-4599-e053-1705fe0aef77 441
Data Transfers Analysis in Computer Assisted Design Flow of FPGA Accelerators for Aerospace Systems, file e0c31c0a-cc24-4599-e053-1705fe0aef77 417
A Design Flow Engine for the Support of Customized Dynamic High Level Synthesis Flows, file e0c31c0e-af59-4599-e053-1705fe0aef77 413
Performance estimation of embedded software with confidence levels, file e0c31c09-1c20-4599-e053-1705fe0aef77 406
Modeling pipelined application with Synchronous Data Flow graphs, file e0c31c09-1c22-4599-e053-1705fe0aef77 404
Enabling the high level synthesis of data analytics accelerators, file e0c31c09-dbed-4599-e053-1705fe0aef77 393
Automated bug detection for pointers and memory accesses in High-Level Synthesis compilers, file e0c31c09-e741-4599-e053-1705fe0aef77 380
Trace-based automated logical debugging for high-level synthesis generated circuits, file e0c31c09-2f45-4599-e053-1705fe0aef77 371
Software defined architectures for data analytics, file e0c31c0d-0d29-4599-e053-1705fe0aef77 365
Exploiting Outer Loops Vectorization in High Level Synthesis, file e0c31c09-21d6-4599-e053-1705fe0aef77 355
Performance Estimation of Task Graphs Based on Path Profiling, file e0c31c09-22b4-4599-e053-1705fe0aef77 346
Enabling Automated Bug Detection for IP-based Designs using High-Level Synthesis, file e0c31c0c-01d0-4599-e053-1705fe0aef77 346
Automated Bug Detection for High-level Synthesis of Multi-threaded Irregular Applications, file e0c31c0f-da29-4599-e053-1705fe0aef77 332
Performance modeling of embedded applications with zero architectural knowledge, file e0c31c09-1bc6-4599-e053-1705fe0aef77 324
Tensor Optimization for High-Level Synthesis Design Flows, file e0c31c0f-fe87-4599-e053-1705fe0aef77 319
A Dynamically Scheduled Architecture for the Synthesis of Graph Database Queries, file e0c31c09-e77b-4599-e053-1705fe0aef77 307
Speeding-Up Expensive Evaluations in High-Level Synthesis Using Solution Modeling and Fitness Inheritance, file e0c31c0a-0bf9-4599-e053-1705fe0aef77 296
Automatic parallelization of sequential specifications for symmetric MPSoCs, file e0c31c09-1b51-4599-e053-1705fe0aef77 292
hArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms, file e0c31c09-e1d0-4599-e053-1705fe0aef77 290
The SODA approach: leveraging high-level synthesis for hardware/software co-design and hardware specialization: invited, file a4cf099a-68ad-4008-8723-42c2bfb025d0 287
Modeling Resolution of Resources Contention in Synchronous Data Flow Graphs, file e0c31c09-22b7-4599-e053-1705fe0aef77 284
Combining Target-independent Analysis with Dynamic Profiling to Build the Performance Model of a DSP, file e0c31c09-1bc2-4599-e053-1705fe0aef77 227
Performance Modeling of Parallel Applications on MPSoCs, file e0c31c09-2381-4599-e053-1705fe0aef77 227
Fine grain analysis of simulators accuracy for calibrating performance models, file e0c31c09-1bbf-4599-e053-1705fe0aef77 224
Automatic Generation of Heterogeneous SoC Architectures with Secure Communications, file e0c31c0f-d357-4599-e053-1705fe0aef77 220
In Car Audio, file e0c31c09-cb16-4599-e053-1705fe0aef77 183
End-to-End Synthesis of Dynamically Controlled Machine Learning Accelerators, file fac6a9a2-2112-4e07-828f-39353836a0fc 178
Using Speculative Computation and Parallelizing Techniques to Improve Scheduling of Control based Designs, file e0c31c09-2e6d-4599-e053-1705fe0aef77 147
Hardware acceleration of complex machine learning models through modern high-level synthesis, file b52336f1-04aa-40c7-88da-36987853c7e7 145
Tensor Optimization for High-Level Synthesis Design Flows, file e0c31c10-d872-4599-e053-1705fe0aef77 138
The hArtes Tool Chain, file e0c31c09-d978-4599-e053-1705fe0aef77 133
GrailQuest and HERMES: hunting for gravitational wave electromagnetic counterparts and probing space-time quantum foam, file e0c31c10-cd8e-4599-e053-1705fe0aef77 122
Towards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis, file 314e74e8-f2c5-4d4a-838d-aa0827940d6f 110
Partitioning and Mapping for the hArtes European Project, file e0c31c09-238a-4599-e053-1705fe0aef77 102
Hardware Acceleration of Complex Machine Learning Models through Modern High-Level Synthesis, file e0c31c12-0a9e-4599-e053-1705fe0aef77 88
SODA synthesizer: An open-source, multi-level, modular, extensible compiler from high-level frameworks to silicon, file 528ff192-d39e-44d6-9cb1-f0f81aba2fc2 67
Parametric Throughput Oriented Large Integer Multipliers for High Level Synthesis, file e0c31c12-4b5c-4599-e053-1705fe0aef77 63
Using High-Level Synthesis to model System Verilog procedural timing controls, file 09bd67ea-45b1-40e3-8b04-b86cf6fd8457 57
TrueFloat: A Templatized Arithmetic Library for HLS Floating-Point Operators, file e2629ec7-c0ed-446b-b866-9a4ee537834e 42
Hardware Acceleration of Complex Machine Learning Models through Modern High-Level Synthesis, file e0c31c11-e369-4599-e053-1705fe0aef77 41
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms, file e0c31c11-6965-4599-e053-1705fe0aef77 40
HERMES: qualification of High pErformance pRogrammable Microprocessor and dEvelopment of Software ecosystem, file d1194fa8-1dd0-44a2-93ed-ceced2e32094 32
Exploration of Synthesis Methods from Simulink Models to FPGA for Aerospace Applications, file f94a6e8b-0228-4547-8e72-2f124c470b0a 31
High-Level Synthesis of the OpenMP runtime to improve the generation of parallel accelerators, file 6f2ad79c-0eca-4086-83a7-fc6dcf9f9a47 24
MLIR Loop Optimizations for High-Level Synthesis: a Case Study, file c9078e4b-eecd-4183-bcb0-a102986de220 16
hArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms, file e0c31c07-e36e-4599-e053-1705fe0aef77 5
hArtes: Holistic Approach to Reconfigurable Real-Time Embedded SystemsReconfigurable Computing, file e0c31c08-0874-4599-e053-1705fe0aef77 5
The HERMES-technologic and scientific pathfinder, file e0c31c11-e1c3-4599-e053-1705fe0aef77 4
In Car Audio, file e0c31c07-f97d-4599-e053-1705fe0aef77 3
A Survey and Evaluation of FPGA High-Level Synthesis Tools, file e0c31c0a-13cc-4599-e053-1705fe0aef77 3
Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators, file e0c31c12-17df-4599-e053-1705fe0aef77 3
Behavioral test generation for the selection of BIST logic, file e0c31c09-e989-4599-e053-1705fe0aef77 2
High-Level Synthesis of Parallel Specifications Coupling Static and Dynamic Controllers, file e0c31c11-89ce-4599-e053-1705fe0aef77 2
High-Level Synthesis Developments in the Context of European Space Technology Research (Invited Talk), file 6e12387e-361f-42f4-83e9-744c80536731 1
Using Speculative Computation and Parallelizing Techniques to Improve Scheduling of Control based Designs, file e0c31c07-c1eb-4599-e053-1705fe0aef77 1
Functional Test Generation, file e0c31c07-d803-4599-e053-1705fe0aef77 1
Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems, file e0c31c07-ea72-4599-e053-1705fe0aef77 1
A design methodology to implement memory accesses in High-Level Synthesis, file e0c31c07-f1a4-4599-e053-1705fe0aef77 1
The hArtes Tool Chain, file e0c31c07-f97c-4599-e053-1705fe0aef77 1
Totale 19.969
Categoria #
all - tutte 30.514
article - articoli 12.057
book - libri 0
conference - conferenze 17.198
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 1.259
Totale 61.028


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2018/2019979 0 0 0 0 0 0 0 0 169 224 347 239
2019/20202.316 205 166 190 157 200 175 173 232 204 154 211 249
2020/20212.815 219 239 185 262 255 157 196 280 233 232 240 317
2021/20223.893 314 165 246 586 553 251 246 269 281 185 508 289
2022/20233.355 151 204 465 336 282 223 252 281 286 289 361 225
2023/20243.166 306 359 354 430 265 258 418 444 332 0 0 0
Totale 19.969