| Nome |
# |
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On-chip dynamic resource management, file e0c31c0f-302e-4599-e053-1705fe0aef77
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568
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A Neural Network Based Fault Management Scheme for Reliable Image Processing, file e0c31c10-788d-4599-e053-1705fe0aef77
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381
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A Runtime Resource Management Policy for OpenCL Workloads on Heterogeneous Multicores, file e0c31c0d-387b-4599-e053-1705fe0aef77
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264
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Error Modeling for Image Processing Filters accelerated onto SRAM-based FPGAs, file e0c31c10-3f08-4599-e053-1705fe0aef77
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228
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Thermal-Cycling-aware Dynamic Reliability Management in Many-Core System-on-Chip, file e0c31c10-3882-4599-e053-1705fe0aef77
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219
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A Smart Fault Detection Scheme for Reliable Image Processing Applications, file e0c31c0d-29ff-4599-e053-1705fe0aef77
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218
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A methodology for the design and deployment of distributed cyber–physical systems for smart environments, file e0c31c10-788b-4599-e053-1705fe0aef77
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212
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Scalable analytical model for reliability measures in aging VLSI by interacting Markovian agents, file e0c31c0e-e5ab-4599-e053-1705fe0aef77
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197
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Design Methodologies for Reconfigurable NoC-based Embedded Systems, file e0c31c08-db65-4599-e053-1705fe0aef77
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156
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Lightweight Fault Detection and Management for Image Restoration, file e0c31c11-1351-4599-e053-1705fe0aef77
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152
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An Approximation-based Fault Detection Scheme for Image Processing Applications, file e0c31c10-73b4-4599-e053-1705fe0aef77
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131
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Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation, file e0c31c0e-d110-4599-e053-1705fe0aef77
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124
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CAST: Content-Aware STT-MRAM Cache Write Management for Different Levels of Approximation, file e0c31c10-e3d6-4599-e053-1705fe0aef77
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107
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Quality of Service Driven Runtime Resource Allocation in Reconfigurable HPC Architectures, file e0c31c0c-117a-4599-e053-1705fe0aef77
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98
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Performance/Reliability-Aware Resource Management for Many-Cores in Dark Silicon Era, file e0c31c0e-f6fe-4599-e053-1705fe0aef77
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77
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Run-time Resource Management in CMPs Handling Multiple Aging Mechanisms, file 2da8da31-7f7f-497d-869e-5e478050931c
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62
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Can Dark Silicon Be Exploited to Prolong System Lifetime?, file e0c31c0f-0896-4599-e053-1705fe0aef77
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60
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Reliability-Aware Runtime Power Management for Many-Core Systems in the Dark Silicon Era, file e0c31c0e-ea3a-4599-e053-1705fe0aef77
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56
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Selective Hardening of CNNs based on Layer Vulnerability Estimation, file 7d6ce0ef-39e3-4574-92ba-6ebcd7ba500d
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51
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Asynchronous Corner Tracking Algorithm Based on Lifetime of Events for DAVIS Cameras, file e0c31c10-e3d8-4599-e053-1705fe0aef77
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51
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Exploring heterogeneous task-level parallelism in a BMA video coding application using system-level simulation, file e0c31c0e-e694-4599-e053-1705fe0aef77
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49
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Thread-level Parallelism in Fault Simulation of Deep Neural Networks on Multi-Processor Systems, file 5ce276c1-5acc-4fbd-a83d-5feed31f0e2d
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46
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Usability-based Cross-Layer Reliability Evaluation of Image Processing Applications, file e0c31c12-45b2-4599-e053-1705fe0aef77
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45
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Fault Impact Estimation for Lightweight Fault Detection in Image Filtering, file e0c31c12-7687-4599-e053-1705fe0aef77
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45
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A runtime controller for openCL applications on heterogeneous system architectures, file e0c31c0e-ea38-4599-e053-1705fe0aef77
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44
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A fault-injection methodology for the system-level dependability analysis of multiprocessor embedded systems, file e0c31c0d-6b46-4599-e053-1705fe0aef77
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41
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Design of Fault-Tolerant Distributed Cyber-Physical Systems for Smart Environments, file a9a127ad-a1b3-48d8-af34-3cc9f6eef6c9
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38
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Hierarchical Fault Simulation of Deep Neural Networks on Multi-Core Systems, file e0c31c12-8628-4599-e053-1705fe0aef77
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33
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Fast and Accurate Error Simulation for CNNs Against Soft Errors, file d67c51ec-fc9b-4c3c-96c7-4f39b60ebf92
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29
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A power-aware approach for online test scheduling in many-core architectures, file e0c31c12-9834-4599-e053-1705fe0aef77
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24
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Energy-Efficient Mobile Robot Control via Run-time Monitoring of Environmental Complexity and Computing Workload, file e0c31c12-8b90-4599-e053-1705fe0aef77
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18
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Dynamic resource-aware corner detection for bio-inspired vision sensors, file e0c31c12-3bfb-4599-e053-1705fe0aef77
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15
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Analyzing the Reliability of Alternative Convolution Implementations for Deep Learning Applications, file 9dce40d8-0a79-474f-abf1-0058089e0371
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9
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Dependability of Alternative Computing Paradigms for Machine Learning: hype or hope?, file c768593b-fc6b-4ac9-9221-20b231f41e18
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7
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Exploiting Memory Resilience for Emerging Technologies: An Energy-Aware Resilience Exemplar for STT-RAM Memories, file 7f20d3dd-532b-4b0e-8c9b-ddb6271905b5
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6
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Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach, file e0c31c08-234d-4599-e053-1705fe0aef77
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6
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Guest Editorial: Defect and Fault Tolerance in VLSI and Nanotechnology Systems, file 8f98ee58-89e7-4712-b7ce-3cc0b9316bf8
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5
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Approximation-Based Fault Tolerance in Image Processing Applications, file f6032139-8484-473e-a595-78067d4210da
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5
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A power-aware approach for online test scheduling in many-core architectures, file e0c31c09-e297-4599-e053-1705fe0aef77
|
4
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A fault-injection methodology for the system-level dependability analysis of multiprocessor embedded systems, file e0c31c0a-2a93-4599-e053-1705fe0aef77
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3
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Reliability-Aware Runtime Power Management for Many-Core Systems in the Dark Silicon Era, file e0c31c0a-9011-4599-e053-1705fe0aef77
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3
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Guest Editor's Introduction: Special Section on Reliability-Aware Design and Analysis Methods for Digital Systems: From Gate to System Level, file d1093c07-61d9-4aa1-ac33-34dde031730e
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2
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Software and Hardware Techniques for SEU Detection in IP Processors, file e0c31c07-ca4e-4599-e053-1705fe0aef77
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2
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Reliability-driven System-level Synthesis for Mixed-Critical Embedded Systems, file e0c31c08-0a7a-4599-e053-1705fe0aef77
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2
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Combined DVFS and mapping exploration for lifetime and soft-error susceptibility improvement in MPSoCs, file e0c31c08-21b3-4599-e053-1705fe0aef77
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2
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Workload-aware power optimization strategy for asymmetric multiprocessors, file e0c31c09-e28f-4599-e053-1705fe0aef77
|
2
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Lifetime-aware load distribution policies in multi-core systems: An in-depth analysis, file e0c31c09-e336-4599-e053-1705fe0aef77
|
2
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A methodology for preference-based personalization of contextual data, file e0c31c0a-1a1b-4599-e053-1705fe0aef77
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2
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Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation, file e0c31c0a-8eb3-4599-e053-1705fe0aef77
|
2
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Performance/Reliability-Aware Resource Management for Many-Cores in Dark Silicon Era, file e0c31c0b-3eea-4599-e053-1705fe0aef77
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2
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Multi-level fault modeling for transaction-level specifications, file e0c31c07-d0d9-4599-e053-1705fe0aef77
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1
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A Fault Analysis and Classifier Framework for Reliability-Aware SRAM-Based FPGA Systems, file e0c31c07-d0da-4599-e053-1705fe0aef77
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1
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ADaPT: Automatic data personalization based on contextual preferences, file e0c31c08-1ec0-4599-e053-1705fe0aef77
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1
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A lifetime-aware runtime mapping approach for many-core systems in the dark silicon era, file e0c31c09-e012-4599-e053-1705fe0aef77
|
1
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Lifetime reliability modeling and estimation in multi-core systems, file e0c31c09-e291-4599-e053-1705fe0aef77
|
1
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On the automation of high level synthesis of convolutional neural networks, file e0c31c0a-0cfa-4599-e053-1705fe0aef77
|
1
|
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A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip, file e0c31c0a-1508-4599-e053-1705fe0aef77
|
1
|
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An automated framework for the simulation of mapping solutions on heterogeneous MPSoCs, file e0c31c0a-1acd-4599-e053-1705fe0aef77
|
1
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A lightweight and open-source framework for the lifetime estimation of multicore systems, file e0c31c0a-1aed-4599-e053-1705fe0aef77
|
1
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Self-Adaptive Fault Tolerance in Multi-/Many-Core Systems, file e0c31c0a-1b58-4599-e053-1705fe0aef77
|
1
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Autonomous Fault-Tolerant Systems onto SRAM-based FPGA Platforms, file e0c31c0a-1b5c-4599-e053-1705fe0aef77
|
1
|
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ReSP: A Non-Intrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration, file e0c31c0a-1c27-4599-e053-1705fe0aef77
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1
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Design Space Exploration for the Design of Reliable SRAM-based FPGA Systems, file e0c31c0a-1c72-4599-e053-1705fe0aef77
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1
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Combined software and hardware techniques for the design of reliable IP processors, file e0c31c0a-1f98-4599-e053-1705fe0aef77
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1
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A model of soft error effects in generic IP processors, file e0c31c0a-fffc-4599-e053-1705fe0aef77
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1
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Hybrid Service Oriented Architectures: A Case Study in the Automotive Domain., file e0c31c0b-3d0e-4599-e053-1705fe0aef77
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1
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Optimizing streaming stencil time-step designs via FPGA floorplanning, file e0c31c0b-a806-4599-e053-1705fe0aef77
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1
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Epistemic uncertainty propagation in a Weibull environment for a two-core system-on-chip, file e0c31c0c-6985-4599-e053-1705fe0aef77
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1
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Approximation-aware coordinated power/performance management for heterogeneous multi-cores, file e0c31c0c-f8a0-4599-e053-1705fe0aef77
|
1
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A runtime controller for openCL applications on heterogeneous system architectures, file e0c31c0c-f8a2-4599-e053-1705fe0aef77
|
1
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Trends in on-chip dynamic resource management, file e0c31c0d-306d-4599-e053-1705fe0aef77
|
1
|
| Totale |
3.926 |