This paper describes an eight-channel differential pulse generator based on a fast differential bipolar transistor output stage. It has been designed specifically to test new multichannel time-correlated single-photon counting (TCSPC) instruments, while maintaining a wide range of regulation possibilities in terms of frequency, amplitude, delay, and duty cycle. The input signal for each channel can be provided either by an on-board programmable frequency synthesizer or by an external reference shared by all channels. The chosen input is delivered to a delayer loop controlled by a field programmable gate array (FPGA), which provides the desired delay, minimizing the jitter contribution. The delayed signal is fed to an analog differential stage that provides the fast output, whose amplitude and offset are adjusted by a digital-to-analog converter, controlled by the FPGA. The experimental results on the instrument show an output slew rate of 1600 V/$mu text{s}$ over the complete full-scale range, which is between -2 and 6 V. The feedback delayer regulates the delay between 0 ns and 30 $mu text{s}$ whereas the high time is adjustable from a minimum of 10 ns to a maximum of 30 $mu text{s}$ . Finally, the frequency range is from 2 kHz to 50 MHz. All these adjustable parameters are managed by a microcontroller that works as an interface between the FPGAs and dedicated PC software. The implemented structure allows the system to achieve a time resolution down to 6 ps across all channels, making this instrument perfect for testing high time resolution TCSPC systems.

Eight-Channel Fully Adjustable Pulse Generator

MIARI, LUCA;ANTONIOLI, SEBASTIANO;LABANCA, IVAN GIUSEPPE;CROTTI, MATTEO CARLO;RECH, IVAN;GHIONI, MASSIMO ANTONIO
2015-01-01

Abstract

This paper describes an eight-channel differential pulse generator based on a fast differential bipolar transistor output stage. It has been designed specifically to test new multichannel time-correlated single-photon counting (TCSPC) instruments, while maintaining a wide range of regulation possibilities in terms of frequency, amplitude, delay, and duty cycle. The input signal for each channel can be provided either by an on-board programmable frequency synthesizer or by an external reference shared by all channels. The chosen input is delivered to a delayer loop controlled by a field programmable gate array (FPGA), which provides the desired delay, minimizing the jitter contribution. The delayed signal is fed to an analog differential stage that provides the fast output, whose amplitude and offset are adjusted by a digital-to-analog converter, controlled by the FPGA. The experimental results on the instrument show an output slew rate of 1600 V/$mu text{s}$ over the complete full-scale range, which is between -2 and 6 V. The feedback delayer regulates the delay between 0 ns and 30 $mu text{s}$ whereas the high time is adjustable from a minimum of 10 ns to a maximum of 30 $mu text{s}$ . Finally, the frequency range is from 2 kHz to 50 MHz. All these adjustable parameters are managed by a microcontroller that works as an interface between the FPGAs and dedicated PC software. The implemented structure allows the system to achieve a time resolution down to 6 ps across all channels, making this instrument perfect for testing high time resolution TCSPC systems.
2015
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/985411
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