In this work we present the circuit VERDI (VErsatile Readout for Detector Integration), an integrated circuit developed for the readout of different families of radiation detectors, from nitrogen-cooled Ge and Si(Li) detectors, to silicon drift detectors (SDDs), scintillation detectors, photomultipliers tubes and others. The circuit may represent a suitable solution when a compact integration between a multi-element detector and the front-end readout is needed to realize a compact and low-power detection module. The circuit includes 8 channels, each one composed by a charge preamplifier, a shaping amplifier, a gain stage, a baseline holder and a peak stretcher. An on-chip selector provides at the output of each channel the waveform of a specific stage, including an RC integrator for external digital processing of the signal. Alternatively, the 8 channels may be multiplexed on a single output. Different settings, like gain, shaping time, preamplifier compensation and others, may be externally programmed by SPI accordingly to the specific detector in use. Only the input JFET, feedback capacitor and reset device are left external to the ASIC, and must be chosen specifically for each detector. The results of preliminary experimental characterization of the circuit when used with different detectors are presented in this work.
VERDI: A versatile readout ASIC for radiation detectors
CELANI, ANDREA;BOMBELLI, LUCA;FIORINI, CARLO ETTORE;FRIZZI, TOMMASO;NAVA, RICCARDO;
2010-01-01
Abstract
In this work we present the circuit VERDI (VErsatile Readout for Detector Integration), an integrated circuit developed for the readout of different families of radiation detectors, from nitrogen-cooled Ge and Si(Li) detectors, to silicon drift detectors (SDDs), scintillation detectors, photomultipliers tubes and others. The circuit may represent a suitable solution when a compact integration between a multi-element detector and the front-end readout is needed to realize a compact and low-power detection module. The circuit includes 8 channels, each one composed by a charge preamplifier, a shaping amplifier, a gain stage, a baseline holder and a peak stretcher. An on-chip selector provides at the output of each channel the waveform of a specific stage, including an RC integrator for external digital processing of the signal. Alternatively, the 8 channels may be multiplexed on a single output. Different settings, like gain, shaping time, preamplifier compensation and others, may be externally programmed by SPI accordingly to the specific detector in use. Only the input JFET, feedback capacitor and reset device are left external to the ASIC, and must be chosen specifically for each detector. The results of preliminary experimental characterization of the circuit when used with different detectors are presented in this work.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.