The vast diffusion of microcontrollers has led to their employment in security sensitive contexts, where the need for trusted implementations of cryptographic algorithms is paramount. These architectures are usually endowed with software and occasionally hardware implementation of ciphers, but in both cases, the price envelope is the first figure to be optimised. The strongest threat to microcontroller security has been proven to be represented by side-channel attacks: power consumption analysis and Electromagnetic (EM) emissions analysis being the prime opportunities to retrieve the secret key embedded in the devices via commonly overlooked information leakage. We propose an efficient solution to the problem of compromising EM emissions from an embedded device, showing which are the design space parameters available to the designer, and how to appropriately tune the security margin with respect to the performances, obtaining an order of magnitude improvement over the state-of-the-art solutions.

Secure and Efficient Design of Block Cipher Implementations on Microcontrollers

BARENGHI, ALESSANDRO;PELOSI, GERARDO;TERRANEO, FEDERICO
2013

Abstract

The vast diffusion of microcontrollers has led to their employment in security sensitive contexts, where the need for trusted implementations of cryptographic algorithms is paramount. These architectures are usually endowed with software and occasionally hardware implementation of ciphers, but in both cases, the price envelope is the first figure to be optimised. The strongest threat to microcontroller security has been proven to be represented by side-channel attacks: power consumption analysis and Electromagnetic (EM) emissions analysis being the prime opportunities to retrieve the secret key embedded in the devices via commonly overlooked information leakage. We propose an efficient solution to the problem of compromising EM emissions from an embedded device, showing which are the design space parameters available to the designer, and how to appropriately tune the security margin with respect to the performances, obtaining an order of magnitude improvement over the state-of-the-art solutions.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/748573
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