Low-noise and large-area CMOS SPADs with timing response free from slow tails

This paper reports the design and the characterization of Single-Photon Avalanche Diodes (SPADs) fabricated in a standard 0.35 um CMOS technology aimed at very low noise and sharp timing response. We present the investigation on the breakdown voltage, photon detection efficiency (PDE), dark count rate (DCR) and timing response on devices with different dimensions and shapes of the active area. Results show uniform breakdown voltage among different structures, PDE above 50% at 420 nm, DCR below 50 cps at room temperature and timing response with no exponential tail and typical full-width at half-maximum of 77 ps and 120 ps for 10 um and 30 um active areas, respectively. The fabricated devices enable the fabrication of imagers with CMOS SPAD arrays suitable for advanced applications demanding extremely low noise and picosecond timing accuracy.