Low-Field Amorphous State Resistance and Threshold Voltage Drift in Chalcogenide Materials

A detailed investigation of the time evolution for the low-field resistance o and the threshold voltage th in chalcogenide- based phase–change memory devices is presented. It is observed that both o and th increase and become stable with time and temperature, thus improving the cell readout window. Relying on a microscopic model, the drift of o and th is linked to the dynamic of the intrinsic traps typical of amorphous chalcogenides, thus providing for the first time a unified framework for the comprehension of chalcogenide materials transient behavior.