A complete four channel acquisition system for high resolution spectroscopy has been designed and realized. The analog section is composed of four semi-Gaussian shaping amplifiers with two software-selectable shaping times. The shaping times (150 and 450 ns) were chosen to perform either high rate or best resolution XRF measurements with state-of-the-art multielement silicon drift detector. The pulses’ amplitudes are caught by four largebandwidth peak-stretchers whose outputs are multiplexed into a single 10 MHz 12-bit analog-to-digital converter (ADC). A fieldprogrammable gate array (FPGA) operating at 24 MHz (or 48 MHz) clock frequency controls the whole process and stores the four spectra in the on-chip RAM, thus guaranteeing a maximum counting rate per bin of 332 kcps and an overall counting rate in excess of 4 Mcps. The system interfaces the host PC by means of the enhanced parallel port with a custom made control software for data visualization and analysis as in a conventional MCA system. If more than four channels have to be managed, various boards can be operated in parallel on the same EPP bus.

High-speed FPGA-based pulse-height analyzer for high resolution X-ray spectroscopy

BUZZETTI, SIRO;GUAZZONI, CHIARA;LONGONI, ANTONIO FRANCESCO;
2005-01-01

Abstract

A complete four channel acquisition system for high resolution spectroscopy has been designed and realized. The analog section is composed of four semi-Gaussian shaping amplifiers with two software-selectable shaping times. The shaping times (150 and 450 ns) were chosen to perform either high rate or best resolution XRF measurements with state-of-the-art multielement silicon drift detector. The pulses’ amplitudes are caught by four largebandwidth peak-stretchers whose outputs are multiplexed into a single 10 MHz 12-bit analog-to-digital converter (ADC). A fieldprogrammable gate array (FPGA) operating at 24 MHz (or 48 MHz) clock frequency controls the whole process and stores the four spectra in the on-chip RAM, thus guaranteeing a maximum counting rate per bin of 332 kcps and an overall counting rate in excess of 4 Mcps. The system interfaces the host PC by means of the enhanced parallel port with a custom made control software for data visualization and analysis as in a conventional MCA system. If more than four channels have to be managed, various boards can be operated in parallel on the same EPP bus.
2005
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/554383
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