Header Error Control in all optical ATM switching nodes is discussed. An architecture of an error detection subsystem is designed suitable for free-space parallel optical implementation.
Free-space architecture for an ATM header processing function
MAIER, GUIDO ALBERTO;BOFFI, PIERPAOLO;MARTINELLI, MARIO
1998-01-01
Abstract
Header Error Control in all optical ATM switching nodes is discussed. An architecture of an error detection subsystem is designed suitable for free-space parallel optical implementation.File in questo prodotto:
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