A system For decoding digital signals subjected to block coding comprising a post-processor which corrects the codewords affected by error, identifying them with the most likely sequence which is a channel sequence and which satisfies a syndrome check. The post-processor is a finite-state machine described by a graph which represents the set of error events, the set of respective transitions defining the structure of said set of error events. Preferably, the post-processor evolves in steps through subsequent transition matrices, deleting at each step the paths which accumulate an invalid number of error events or an excessive number of wrong bits, paths which accumulate a total reliability higher than a given threshold, paths with a invalid check on the received sequence, and paths which reveal an invalid syndrome after having reached a maximum number of events.
Process for decoding signals and system and computer program product therefore
REGGIANI, LUCA;
2005-01-01
Abstract
A system For decoding digital signals subjected to block coding comprising a post-processor which corrects the codewords affected by error, identifying them with the most likely sequence which is a channel sequence and which satisfies a syndrome check. The post-processor is a finite-state machine described by a graph which represents the set of error events, the set of respective transitions defining the structure of said set of error events. Preferably, the post-processor evolves in steps through subsequent transition matrices, deleting at each step the paths which accumulate an invalid number of error events or an excessive number of wrong bits, paths which accumulate a total reliability higher than a given threshold, paths with a invalid check on the received sequence, and paths which reveal an invalid syndrome after having reached a maximum number of events.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
