Hokidachi: Low-Latency Random Forest Inference on FPGAs through full Horizontal Parallelism

Random Forests (RFs) are simple, interpretable, and parallelizable Machine Learning (ML) models, well-suited for deployment on edge devices such as Field-Programmable Gate Arrays (FPGAs). Existing hardware accelerators often exploit both horizontal and vertical parallelism of RFs to improve performance, at the cost of increasing hardware complexity. We propose Hokidachi, a novel RF accelerator architecture that relies solely on horizontal parallelism, reducing memory fragmentation and enhancing compatibility with a wider range of models, while also enabling between 2× and 4× lower inference latencies.