A Low-Power Single-Ended SAR ADC With Energy-Efficient Differential Switching for Ultrafast X-Ray Imagers

This work presents a SAR ADC architecture designed for single-ended-to-differential conversion with low-energy switching and area efficiency. By incorporating top and bottom sampling techniques, the architecture achieves seamless conversion without the need for extra DAC hardware. It offers configurable fully-differential or single-ended modes by means of Vcm-based switching. With 75% reduced total capacitance compared to the conventional method, consistent energy savings are achieved across configurations. Implemented in 130nm CMOS, this design features an array of 48 ADCs and custom on-chip voltage references integrated within the SparkPix-S ASIC, a device tailored for X-ray imagers. With a nominal sampling rate of 5 MSps and 1.2V supply voltage, the achieved SNDR is 54.5dB, with +0.98/-0.86 LSB of DNL and +0.83/-1.26 LSB of INL. The core SAR ADC average power consumption is 96μW, resulting in a FOM of 40.1 fj/conv-step, all within a compact active area of 0.0212mm2.