Photonic integrated circuits (PICs) allow to implement linear operations directly in the light domain, taking advantage of the extended bandwidth, low losses and minimal cross-talk associated with optical communication. These architectures benefit from the addition of dedicated electronics that enable run-time programmability, as well as closed-loop stabilization of the working point against drifts and turbulence. This work addresses the issue of the scalability, in terms of area and power consumption, of the electronic control layer, by proposing an application-specific integrated circuit (ASIC) designed for real-time reconfiguration of programmable optical processors. The CMOS controller features 8 independent channels, each one closing a feedback control loop around an integrated photonic interferometric device. In the experiments, a pair of ASICs was connected to a 16-channel binary mesh consisting of 15 Mach-Zehnder Interferometers fabricated in a commercial Silicon Photonics platform. The resulting electronic-photonic chiplet-like system successfully established reliable free-space optical (FSO) links up to 50 Gbit/s, compensating the effect of simulated atmospheric turbulence. The inherent ability of the ASIC to drive each photonic device independently, though, makes it suitable also for applications beyond sheer working point stabilization, whenever a full reconfiguration of the PIC is needed, achieving sub-10 ms settling time when starting from a random working point. The proposed integrated design thus paves the way for the definition of compact and seamlessly scalable electronic controllers for programmable PICs.

8-Channel CMOS Chip for Real-Time Control of Integrated Silicon Photonic Processors

Sacchi, Emanuele;Zanetto, Francesco;Martinez, Andres Ivan;SeyedinNavadeh, SeyedMohammad;Morichetti, Francesco;Melloni, Andrea;Sampietro, Marco;Ferrari, Giorgio
In corso di stampa

Abstract

Photonic integrated circuits (PICs) allow to implement linear operations directly in the light domain, taking advantage of the extended bandwidth, low losses and minimal cross-talk associated with optical communication. These architectures benefit from the addition of dedicated electronics that enable run-time programmability, as well as closed-loop stabilization of the working point against drifts and turbulence. This work addresses the issue of the scalability, in terms of area and power consumption, of the electronic control layer, by proposing an application-specific integrated circuit (ASIC) designed for real-time reconfiguration of programmable optical processors. The CMOS controller features 8 independent channels, each one closing a feedback control loop around an integrated photonic interferometric device. In the experiments, a pair of ASICs was connected to a 16-channel binary mesh consisting of 15 Mach-Zehnder Interferometers fabricated in a commercial Silicon Photonics platform. The resulting electronic-photonic chiplet-like system successfully established reliable free-space optical (FSO) links up to 50 Gbit/s, compensating the effect of simulated atmospheric turbulence. The inherent ability of the ASIC to drive each photonic device independently, though, makes it suitable also for applications beyond sheer working point stabilization, whenever a full reconfiguration of the PIC is needed, achieving sub-10 ms settling time when starting from a random working point. The proposed integrated design thus paves the way for the definition of compact and seamlessly scalable electronic controllers for programmable PICs.
In corso di stampa
ASIC
CMOS
free-space optics
programmable photonics
Silicon Photonics
wireless communication
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1309590
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