Modelling of Electronic Power Converters with Output Inductance During Faults in LVDC Systems

The correct modelling of a converter behaviour during fault events is essential for the accurate assessment of DC fault response and, in turn, for the proper selection of protection devices in DC networks. The circuit model conventionally used in the literature, while effective for many converter topologies, may lead to inaccurate predictions when applied to converters with output inductance. This paper identifies the limitations of the conventional model for this type of converters, particularly in estimating the fault current and its derived indicators, such as Joule integral, current slope and stored energy in the line inductance, which play a crucial role in the design of modern DC protection devices. In this paper, a revised modelling approach is proposed to capture the effect of the converter output inductance without increasing the overall model complexity. The proposed model is validated through simulations of a Buck converter connected to a DC network, demonstrating a high accuracy level in replicating line current, diode current and converter voltage waveforms. Comparative analysis shows that the proposed model provides more reliable estimates for protection indicators while maintaining computational efficiency.