A Layout-Based Method for Analog Fault Injection in the Context of Functional Safety

Digital and analog circuits are fundamental components embedded across a vast array of applications, including but not limited to consumer electronics, automotive systems, aerospace technologies, medical instrumentation, and industrial automation. The critical role they play in ensuring the functionality and efficiency of modern technological systems introduces significant risks, as failures or defects can lead to catastrophic consequences. The focus of this work is on analog fault injection for automotive applications. ISO 26262 sets the global standard for the functional safety of circuits in the automotive domain and identifies fault injection as a key method to assess safety metrics and validate this class of circuits. Although fault injection is a well-known and widely adopted strategy in the digital domain, its usage is less widespread in analog circuits. The purpose of this work is to propose a layout-based method addressed to analog circuits, where parasitic components in the post-layout extracted schematics are used as indicators to assign the likelihood of fault occurrence that may affect the functionality of circuits and impact the safety of the application. Moreover, the proposed approach leverages simulations to enable a quantitative assessment of the diagnostic coverage achieved by the implemented safety mechanisms. Although the results show a Diagnostic Coverage of 91.82%, which falls short of the assumed 99% by ISO 26262 [1], the method provides valuable insight into identifying critical architecture or layout patterns that can be improved to achieve better safety metrics while maintaining electrical performance.