The continuous evolution of side-channel analysis motivates a continuous investigation to deliver novel countermeasures. This work presents a hiding countermeasure leveraging a randomized Dynamic Frequency Scaling (DFS) actuator built on top of the clocking resources available in modern FPGAs. In contrast to state-of-the-art DFS-based solutions, our approach is meant to optimize security and performance metrics with a modest increase in power consumption. We experimentally validated our countermeasure on real hardware by comparing it against recently proposed hiding methods employing clock desynchronization. To strengthen our security assessment, we also considered a large variety of state-of-the-art side-channel attacks, including recent deep-learning ones. The experimental results confirm that none of the evaluated attack techniques can breach our protected target, and TLVA shows no information leakage with 10 million traces. The performance overhead is zero, while the power overhead is limited to 1.55×.

Rabbit: Dynamic Clock Randomization to Protect Against Side-Channel Attacks

Davide Galli;Matteo Matteucci;Davide Zoni
2025-01-01

Abstract

The continuous evolution of side-channel analysis motivates a continuous investigation to deliver novel countermeasures. This work presents a hiding countermeasure leveraging a randomized Dynamic Frequency Scaling (DFS) actuator built on top of the clocking resources available in modern FPGAs. In contrast to state-of-the-art DFS-based solutions, our approach is meant to optimize security and performance metrics with a modest increase in power consumption. We experimentally validated our countermeasure on real hardware by comparing it against recently proposed hiding methods employing clock desynchronization. To strengthen our security assessment, we also considered a large variety of state-of-the-art side-channel attacks, including recent deep-learning ones. The experimental results confirm that none of the evaluated attack techniques can breach our protected target, and TLVA shows no information leakage with 10 million traces. The performance overhead is zero, while the power overhead is limited to 1.55×.
2025
2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1293683
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