Defect detection of printed circuit board surface based on an improved YOLOv8 with FasterNet backbone algorithms

Printed circuit board constitutes a crucial element of electronic equipment, and its surface defects can seriously affect the performance and reliability of the product. To promptly and accurately detect and identify these surface defects, this paper proposes a method for defect detection of printed circuit board surface based on an improved YOLOv8 with FasterNet backbone algorithms. Firstly, FasterNet is employed as the backbone network structure to minimize unnecessary computational overhead and memory accesses, enabling a more streamlined and effective extraction of spatial characteristics. Then, in the Neck layer, the C2f module is exchanged for the C2f_Normalization-based Attention Module. This allows for a more precise focus on important weights, thereby reducing unnecessary computations and parameters. Finally, the loss function of YOLOv8 is substituted with Wise Intersection over Union, which comprehensively considers the surrounding area information and flexibly adjusts the weights. The effectiveness of the method is demonstrated by experimental results on two publicly available PCB datasets. The mAP50 reaches 91.1% with a P of 88.6%, and the mAP50-95 stands at 46.9% on the PCB-AoI dataset. On the HRIPCB dataset, the method attains a mAP50 of 94.4%, a P of 96.1%, and a mAP50-95 of 58.3%. Compared to existing methods, this method shows a comprehensive performance advantage.