The application specific integrated circuit (ASIC) for the front-end charge readout of the X-ray detector for the LEM-X lunar mission concept is presented. The bare die ASIC is composed by a linear array of 32 channels with 150 μm pitch directly wire-bonded to a large-area multi-anode silicon drift detector (SDD) used as the detection plane of an X-ray coded aperture camera. Each anode readout channel integrates an independent analog/ mixed-signal spectroscopic chain composed by a continuous-reset charge sensitive amplifier, a current-mode shaping amplifier, an amplitude discriminator for event detection, a peak-detect and hold circuit for external sampling and time-stamping, and a pile-up rejection logic. The top level circuitry is dedicated to the analog multiplexing and SPI communication with the off-chip back-end electronics. The ASIC, sent for production on a 0.35 μm ultra low-noise CMOS technology, when coupled to the detector, permits to reach a simulated system equivalent noise charge of less than 13 electrons rms, allowing the readout of low-energy X-ray photons from 0.5 keV up to 70 keV at 0 ∘C, and complying with an functional temperature range from –55 ∘C to +30 ∘C.
The Front-End Charge Readout IC for the LEM-X Mission Concept
Mele, Filippo;Dedolli, Irisa;Bertuccio, Giuseppe
2025-01-01
Abstract
The application specific integrated circuit (ASIC) for the front-end charge readout of the X-ray detector for the LEM-X lunar mission concept is presented. The bare die ASIC is composed by a linear array of 32 channels with 150 μm pitch directly wire-bonded to a large-area multi-anode silicon drift detector (SDD) used as the detection plane of an X-ray coded aperture camera. Each anode readout channel integrates an independent analog/ mixed-signal spectroscopic chain composed by a continuous-reset charge sensitive amplifier, a current-mode shaping amplifier, an amplitude discriminator for event detection, a peak-detect and hold circuit for external sampling and time-stamping, and a pile-up rejection logic. The top level circuitry is dedicated to the analog multiplexing and SPI communication with the off-chip back-end electronics. The ASIC, sent for production on a 0.35 μm ultra low-noise CMOS technology, when coupled to the detector, permits to reach a simulated system equivalent noise charge of less than 13 electrons rms, allowing the readout of low-energy X-ray photons from 0.5 keV up to 70 keV at 0 ∘C, and complying with an functional temperature range from –55 ∘C to +30 ∘C.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
