An Experimental Comparison of RISC-V Processors: Performance, Power, Area and Security - Special Session Paper-

The RISC-V instruction set architecture (ISA) has garnered significant interest from both industry and academia because of its open source nature. Recent years have witnessed a surge in published implementations of the RISC-V ISA, with various companies actively pursuing its adoption in their products. However, a comprehensive analysis comparing these emerging RISC-V processors with each other and against established embedded computing platforms has not yet been published. This paper presents an experimental evaluation of three high-performance RISC-V processors: BOOM, NOEL-V, and CVA6 (formerly Ariane). The investigation is conducted on a Xilinx Kintex-7 Field-Programmable Gate Array (FPGA) platform. We perform a detailed analysis of critical performance metrics, covering area footprint, power consumption, and performance efficiency. Additionally, we assess the security posture of these cores against transient execution attacks, a prominent contemporary security threat. Finally, a comparative evaluation is undertaken between the RISC-V processors and two conventional application-level ARM processors to elucidate technological discrepancies and application suitability. This analysis aims to provide valuable insights into the current state and potential of RISC-V processors within the embedded computing domain.