To enrich state-of-the-art optical chips with electronic functionalities, we present the integration of unconventional transistors and circuits in a standard silicon photonics platform, with no modifications to the conventional fabrication process employed by photonic foundries. This approach allows us to include on-chip electronic building blocks to support the optical functionality at zero additional cost while maintaining optical excellence and foundry interoperability. To showcase the benefits of monolithic electronics, we integrated a transconductance amplifier and an analog multiplexer for sequential readout of 16 photodetectors, distributed in a large-scale architecture of Mach-Zehnder interferometers (MZIs). The circuits, successfully validated in optical experiments, allow the reduction of electrical input-output lines of a photonic chip without any optical penalty, thus targeting one of the main bottlenecks that limit further scaling of photonic circuits.

Unconventional Monolithic Electronics in a Conventional Silicon Photonics Platform

Zanetto, F;Toso, F;Crico, M;Morichetti, F;Melloni, A;Ferrari, G;Sampietro, M
2023-01-01

Abstract

To enrich state-of-the-art optical chips with electronic functionalities, we present the integration of unconventional transistors and circuits in a standard silicon photonics platform, with no modifications to the conventional fabrication process employed by photonic foundries. This approach allows us to include on-chip electronic building blocks to support the optical functionality at zero additional cost while maintaining optical excellence and foundry interoperability. To showcase the benefits of monolithic electronics, we integrated a transconductance amplifier and an analog multiplexer for sequential readout of 16 photodetectors, distributed in a large-scale architecture of Mach-Zehnder interferometers (MZIs). The circuits, successfully validated in optical experiments, allow the reduction of electrical input-output lines of a photonic chip without any optical penalty, thus targeting one of the main bottlenecks that limit further scaling of photonic circuits.
2023
CMOS electronics
electronic-photonic codesign
monolithic integration silicon photonics
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1252959
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