SCARLET is a novel readout ASIC implemented for integration with monolithic Silicon Drift Detectors (SDD) arrays with bump bonding scheme, i.e. within hybrid pixel assembly, suitable for high-rate high-density energy-dispersive X-ray detection system in synchrotron beamlines or many industrial applications. The first version of the readout ASIC integrates complete pulse processing channel in a pixel structure, consisting of reset-type CSA with PMOS input stage, 7th order semi-Gaussian shaping amplifier, peak stretcher equipped with independent peak detector circuit and optimum pile up rejection scheme, analog memory to enhance throughput, and on-chip SAR ADC, shared between two pixels with sparse multiplexing scheme. The chip layout is compatible for bump bonding assembly with 2×2, 2mm-pitch, square SDD. The first prototype occupies a total area of 7.15mm × 3.31mm. Its static power consumption is 53.38mW/pixel, resulting in power density of 1.33W/cm2. For spectroscopic performance, SCARLET is expected to reach an output count rate density of 25Mcps/cm2 simultaneously with an ENC below 20e-RMS. The first prototype of such chip has been fabricated, functionalities are confirmed and impact of digital-driven disturbances are under evaluation.

First Prototype of 2×2 SCARLET: Readout ASIC for Bump-bonded SDD Array for Large Event Throughput

I. Hafizh;M. Carminati;C. E. Fiorini
2020-01-01

Abstract

SCARLET is a novel readout ASIC implemented for integration with monolithic Silicon Drift Detectors (SDD) arrays with bump bonding scheme, i.e. within hybrid pixel assembly, suitable for high-rate high-density energy-dispersive X-ray detection system in synchrotron beamlines or many industrial applications. The first version of the readout ASIC integrates complete pulse processing channel in a pixel structure, consisting of reset-type CSA with PMOS input stage, 7th order semi-Gaussian shaping amplifier, peak stretcher equipped with independent peak detector circuit and optimum pile up rejection scheme, analog memory to enhance throughput, and on-chip SAR ADC, shared between two pixels with sparse multiplexing scheme. The chip layout is compatible for bump bonding assembly with 2×2, 2mm-pitch, square SDD. The first prototype occupies a total area of 7.15mm × 3.31mm. Its static power consumption is 53.38mW/pixel, resulting in power density of 1.33W/cm2. For spectroscopic performance, SCARLET is expected to reach an output count rate density of 25Mcps/cm2 simultaneously with an ENC below 20e-RMS. The first prototype of such chip has been fabricated, functionalities are confirmed and impact of digital-driven disturbances are under evaluation.
2020
IEEE NSS/MIC 2020 Conference Records
9781728176932
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1170730
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